GS81302TT06 Datasheet, PDF (14/29 Pages) GSI Technology – 144Mb SigmaDDRTM-II+ Burst of 2 SRAM

Capacitance
(T_A = 25^oC, f = 1 MHZ, V_DD = 1.8 V)
Parameter
Input Capacitance
Output Capacitance
Clock Capacitance
Note:
This parameter is sample tested.
Symbol
C_IN
C_OUT
C_CLK
GS81302TT06/11/20/38E-500/450/400/350
Test conditions
V_IN = 0 V
V_OUT = 0 V
V_IN = 0 V
Typ.
Max.
Unit
4
5
pF
6
7
pF
5
6
pF
AC Test Conditions
Parameter
Input high level
Input low level
Max. input slew rate
Input reference level
Output reference level
Note:
Test conditions as specified with output loading as shown unless otherwise noted.
Conditions
1.25 V
0.25 V
2 V/ns
0.75 V
V_DDQ/2
AC Test Load Diagram
DQ
RQ = 250 Ω (HSTL I/O)
50Ω
V_REF = 0.75 V
VT = V_DDQ/2
Input and Output Leakage Characteristics
Parameter
Input Leakage Current
(except mode pins)
Doff
ODT
Symbol
I_IL
I_ILDOFF
I_ILODT
Output Leakage Current
I_OL
Test Conditions
V_IN = 0 to V_DD
V_IN = 0 to V_DD
V_IN = 0 to V_DD
Output Disable,
V_OUT = 0 to V_DDQ
Min.
–2 uA
–20 uA
–2 uA
–2 uA
Max
2 uA
2 uA
20 uA
2 uA
Rev: 1.00b 11/2011
14/29
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2011, GSI Technology