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GS81280Z18GT-250I Datasheet, PDF (14/23 Pages) GSI Technology – 144Mb Pipelined and Flow Through Synchronous NBT SRAM
GS81280Z18/36GT-400/333/250/200
VDD2 Range Logic Levels
Parameter
Input High Voltage
Input Low Voltage
Note:
VIH (max) must be met for any instantaneous value of VDD.
Symbol
VIH
VIL
Min.
0.6*VDD
–0.3
Typ.
Max.
Unit
—
VDD + 0.3
V
—
0.3*VDD
V
Recommended Operating Temperatures
Parameter
Symbol
Min.
Typ.
Max.
Unit
Junction Temperature (Commercial Range Versions)
TJ
0
25
85
C
Junction Temperature (Industrial Range Versions)*
TJ
–40
25
100
C
Note:
* The part numbers of Industrial Temperature Range versions end with the character “I”. Unless otherwise noted, all performance specifications
quoted are evaluated for worst case in the temperature range marked on the device.
Thermal Impedance
Package
Test PCB
Substrate
JA (C°/W)
Airflow = 0 m/s
 JA (C°/W)
Airflow = 1 m/s
 JA (C°/W)
Airflow = 2 m/s
JB (C°/W)  JC (C°/W)
100 TQFP
4-layer
38.28
33.86
32.67
12.74
3.99
Notes:
1. Thermal Impedance data is based on a number of samples from multiple lots and should be viewed as a typical number.
2. Please refer to JEDEC standard JESD51-6.
3. The characteristics of the test fixture PCB influence reported thermal characteristics of the device. Be advised that a good thermal path to
the PCB can result in cooling or heating of the RAM depending on PCB temperature.
Undershoot Measurement and Timing
Overshoot Measurement and Timing
VIH
20% tKC
VDD + 2.0 V
VSS
50%
50%
VDD
VSS – 2.0 V
20% tKC
VIL
Note:
Input Under/overshoot voltage must be –2 V > Vi < VDDn+2 V not to exceed 4.6 V maximum, with a pulse width not to exceed 20% tKC.
Rev: 1.01 5/2017
14/22
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2015, GSI Technology