GS2986 Datasheet, PDF (8/41 Pages) Gennum Corporation – Standards indication in Auto mode

1.3 Default Start-up Settings
The GS2986 has some functions that are not accessible via direct pin control, and are only
accessible through the host interface registers. These functions have an internal pull-up or
pull-down resistor that sets the default logic level or start-up state, if it is not already set by
a pin.
If the user wishes to override these logic levels, the associated bit should be programmed
within the PIN_OR_1 register (pin override register) at address 0x0C. The logic values
within the PIN_OR_1 register become active when the user sets the Pin Override Enable bit
to HIGH within that same register.
Table 1-2 shows:
1. The default logic state set by the internal pull-up or pull-down resistors.
2. The default values within the Pin Override register upon reset.
More details are given in Section 4.15.
Table 1-2: GS2986 Default Start-up Settings
Name
Description
Default State set by
Internal Resistors
BYPASS
AUTOBYPASS
AUTO/MAN
SS0, SS1
KBB
DATA_MUTE
DATA/CLOCK
DE_EN
Bypasses the reclocker stage when set HIGH.
When set HIGH, this bit automatically bypasses the
reclocker stage when the PLL is not locked to a
supported rate.
When set HIGH, the standard is automatically detected
from the input data rate.
When AUTO/MAN is set HIGH, SS[1:0] are outputs
displaying the data rate to which the PLL has locked.
Therefore, the bits will not have a default start-up
value.
Controls the loop bandwidth of the PLL.
Mutes the DDO0/DDO0 and DDO1/DDO1 (if data is
selected) outputs when LOW.
HIGH = DATA
LOW = CLOCK
De-emphasis on/off pin for serial digital output.
HIGH = de-emphasis on
LOW = de-emphasis off
0
0
1
None
Floating
1
0
0
Default State within
the Pin Override
Register
0
0
0
0:0
Ground
0
0
0
GS2986 Multi-Rate SDI Reclocker with Equalization &
De-emphasis
Data Sheet
52134 - 3
July 2012
8 of 41