GS1881 Datasheet, PDF (12/14 Pages) Gennum Corporation – Monolithic Video Sync Separators

The interfering hum component is defined by:
verifying that there is enough clamping current
v_HUM(t) = V_Pcos(2πƒ_HUMt)
where: V_P = Peak voltage of AC hum
ƒ_HUM = Frequency of hum (50 Hz or 60 Hz)
The maximum rate of change of this hum signal occurs at the
zero crossing points and is:
dv_HUM
dt
t
=
π
2
,
3π
2
= ± V_P2πƒ_HUM
Since the horizontal scan period is much faster than the period
of
the
interference
(
63.5
µs
<<
1/ƒ )
HUM
a
good
approximation
is to assume that the maximum line to line voltage change
resulting from the interfering hum is:
∆V_HUM = ± V_P2πƒ_HUM T_LINE
where: T_LINE = 63.5 µs
The total line to line voltage change (∆V_T) can then be calculated
by adding the hum component (∆V_HUM ) and the droop
component (V_DROOP). This calculation results in two cases:
∆V_T
∆V_T
Case A
Case B
∆V_T = ∆V_HUM + V_DROOP
To correct for ∆V_T in case A, the input stage must be able to
charge the input capacitor ∆V_T volts in 4.7 µs. This is not a
constraint as the typical clamping current of 650 µA can
accomplish this for practical values of coupling capacitor.
The only way to compensate for ∆V_T in case B is to make
V_DROOP >∆ V_HUM. V_DROOP is increased by decreasing the input
coupling capacitor value. Therefore the video designer can
increase hum rejection by decreasing the value of this capacitor.
The following is a numerical example:
∆V_t = 29.4 mV + 29.4 mV = 58.8 mV
( ) .^.. i = 0.022 µ ^{58.8 mV} = 275 µA
4.7 µ
which is less than 650 µA.
(2) FIltering
In order to keep the input to output delay small and temperature
stable, no chrominance filtering is done within the device.
External filtering may be necessary if the input signal contains
large chrominance components (less than 77 mV from sync
tip) or has significant amounts of high frequency noise. This
filter can be a simple low pass RC network constructed by a
resistance (R_S) in series with the source and a capacitor (C_ƒ)
to ground. A single pole low pass filter having a corner
frequency of approximately 500 kHz will provide ample
bandwidth for passing sync pulses with almost 18 dB
attenuation at 3.58 MHz. Care should be taken in choosing
the value of the series resistor in the filter since the source
resistance seen by the sync separator affects its performance.
As the source resistance rises, the video input sync tip starts
to be clipped due to the clamping current during the sync.
This clamping current is relatively large due to the
non-symmetric duty cycle of video. To a good approximation
the amount of sync clamp current can be calculated as
follows:
( I_CLAMPAVG) (T_SYNC) = (I_DIS) (T_LINE - T_SYNC)
I_CLAMPAVG(4.7 µs) = (11 µA) (63. 5 µs - 4.7 µs)
.^.. I_{CLAMP AVG} = 137.6 µA
This clamp current flows in the source resistance causing a
voltage drop equal to :
V_CLIP = ( I_CLAMP ) (R_S)
AVG
= (137.6 µ) (R_S)
choosing C_c = 0.022 µF
.^..
V_DROOP
=
11
0.022
(63.5
µ
-
4.7
µ)
=
29.4 mV
the maximum amount of 60 Hz hum that could be rejected
would be when:
∆V_DROOP = ∆V_HUM = V_P 2πƒ_HUM T_LINE
.^.. V_P = ^∆VDROOP =
29.4mV
=1.23v_PEAK HUM
2πƒ_HUMT_LINE 2π(60) (63.5 µ)
VIDEO
INPUT
I_CLAMP
R_S
-+
V_CLIP
75Ω
C_C
C_ƒ
8
2
6
4
680k _0.1µ
Fig. 22 Simple Chrominance Filtering
520 - 23 - 03
12