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GS1881 Datasheet, PDF (11/14 Pages) Gennum Corporation – Monolithic Video Sync Separators
APPLICATION NOTES
(1) Choosing the Appropriate Input Coupling Capacitor to
Optimize Slicing Level and Hum Rejection
The video designer can adjust the slicing level by choosing the
value of the input coupling capacitor. The relationship between
slicing level and input coupling capacitor is described by the
following equation.
∆VSLICE
=
IDIS
C
C
∆T
=V
DROOP
where:
IDIS = clamp discharge current = 11 µA
∆T = TLINE - TSYNC = (63.5 µs - 4.7 µs)
CC = input coupling capacitor
Figure 21 is a graphical representation of this equation and
photographs 1 and 2 show the input video waveforms
for 0.1 µF and 0.01 µF input capacitors respectively. The
advantage in choosing a smaller input coupling capacitor, is
increased hum rejection as the following analyses illustrates.
137
127
117
107
97
87
77
0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.10
INPUT COUPLING CAPACITOR (µF)
Fig. 21 Slicing Level vs Input Coupling Capacitor
CH1
CH1
CH2
VIDEO
2
0.1µF
75Ω
4
8
6
680k 0.1µ
Test Circuit 1
CH2
Photograph 1
CH1
CH1
CH2
VIDEO
2
0.01µF
75Ω
4
8
6
680k 0.1µ
Test Circuit 2
CH2
11
Photograph 2
520 - 23 - 03