GS7025 Datasheet, PDF (1/13 Pages) Gennum Corporation – Serial Digital Receiver

PRO-LINX ^™ GS7025
Serial Digital Receiver
FEATURES
• SMPTE 259M-C compliant (270Mb/s)
• automatic cable equalization (typically greater than
350m of high quality cable)
• serial data outputs muted and serial clock remains
active when input data is lost
• operation independent of SAV/EAV sync signals
• signal strength indicator output
• carrier detect with programmable threshold level
• power savings mode (output serial clock disable)
• large IJT, typically 0.56UI beyond loop bandwidth
• robust lock detect
APPLICATIONS
Cable equalization plus clock and data recovery for all high
speed serial digital interface applications involving SMPTE
259M-C.
PRELIMINARY DATA SHEET
DESCRIPTION
The GS7025 provides automatic cable equalization and
high performance clock and data recovery for serial digital
signals. The GS7025 receives either single-ended or
differential serial digital data and outputs differential clock
and retimed data signals at PECL levels (800mV). The on-
board cable equalizer provides up to 35dB of gain at
135MHz which typically results in equalization of greater
than 350m of high quality cable at 270Mb/s.
The GS7025 requires only one external resistor to set the
VCO centre frequency and provides adjustment free
operation.
The GS7025 has dedicated pins to indicate signal
strength, carrier detect, and LOCK. Optional external
resistors allow the carrier detect threshold level to be
customized to the user's requirement. In addition, the
GS7025 provides an 'Output Eye Monitor Test' (OEM_TEST)
for diagnostic testing of signal integrity after equalization,
prior to reslicing. The serial clock outputs can also be
disabled to reduce power. The GS7025 operates from a
single +5 or -5 volt supply.
ORDERING INFORMATION
PART NUMBER
PACKAGE
GS7025-CQM
44 pin MQFP Tray
GS7025-CTM
44 pin MQFP Tape
TEMPERATURE
0°C to 70°C
0°C to 70°C
A/D
DDI
ANALOG
DDI
DIGITAL
MUX
CARRIER DETECT
PHASELOCK
HARMONIC
SDI
SDI
OEM_TEST
+
VARIABLE
GAIN EQ
-^-
STAGE
EYE
MONITOR
FREQUENCY
ACQUISITION
PHASE
DETECTOR
AUTO EQ
CONTROL
+
-
AGC CAP CD_ADJ
SSI/CD
CHARGE
PUMP
VCO
LF+ LFS LF-
CBG R_VCO
BLOCK DIAGRAM
C_OSC
LOGIC _MUTE
LOCK
SDO
SDO
CLK_EN
SCO
SCO
Revision Date: November 2000
Document No. 522 - 80 - 00
GENNUM CORPORATION P.O. Box 489, Stn. A, Burlington, Ontario, Canada L7R 3Y3
Tel. [phone] Fax. [phone] E-mail: [e-mail]
www.gennum.com