GA50JT12-247_15 Datasheet, PDF (9/12 Pages) GeneSiC Semiconductor, Inc. – OFF Silicon Carbide Junction Transistor

GA50JT12-247
Figure 25: Typical steady state gate current supplied by the
GA15IDDJT22-FR4 board for the GA50JT12-247 with the on
board resistance of 0.7 Ω
Figure 26: Maximum gate resistance for safe operation of
the GA50JT12-247 at different drain currents using the
GA15IDDJT22-FR4 board.
B:2: High Speed, Low Loss Drive with Boost Inductor
A High Speed, Low-Loss Driver with Boost Inductor is also capable of driving the GA50JT12-247 at high-speed. It utilizes a gate drive inductor
instead of a capacitor to provide the high-current gate current pulses I_G,on and I_G,off. During operation, inductor L is charged to a specified I_G,on
current value then made to discharge I_L into the SJT gate pin using logic control of S₁, S₂, S₃, and S₄, as shown in Figure 27. After turn on,
while the device remains on the necessary steady state gate current I_G,steady is supplied from source V_CC through R_G. Please refer to the article
“A current-source concept for fast and efficient driving of silicon carbide transistors” by Dr. Jacek Rąbkowski for additional information on this
driving topology.⁴
VCC
S₁
VCC
S₂
L
VEE
S₃
RG
S₄
SiC SJT D
G
S
VEE
Figure 27: Simplified Inductive Pulsed Drive Topology
3 _{– RG = (1/RG1 +1/RG2)}-1_{. Driver is pre-installed with RG1 = 2.2 Ω, RG2 = 1.0 Ω}
4 _{– Archives of Electrical Engineering. Volume 62, Issue 2, Pages 333–343, ISSN (Print) 0004-0746, DOI: 10.2478/aee-2013-0026, June 2013}
Dec 2015
Latest version of this datasheet at: http://www.genesicsemi.com/commercial-sic/sic-junction-transistors/
Pg 9 of 11