GA50JT06-CAL Datasheet, PDF (5/7 Pages) GeneSiC Semiconductor, Inc. – Normally – OFF Silicon Carbide Junction Transistor

Mechanical Specifications
Mechanical Parameters
Raster Size
Area total / active
Thickness
Wafer Size
Flat Position
Passivation frontside
Pad Metal (Anode)
Backside Metal (Cathode)
Die Bond
Wire Bond
Reject ink dot size
Recommended storage environment
Chip Dimensions:
A
C
F
E
G
Die Datasheet
GA50JT06-CAL
4.35 x 4.35
mm²
171 x 171
mil²
18.92/16.56
mm²
29330/25677
mil²
360
µm
14
mil
100
mm
3937
mil
0
deg
0
deg
Polyimide
4000 nm Al
400 nm Ni + 200 nm Au -system
Electrically conductive glue or solder
Al ≤ 10 mil (Source)
Al ≤ 3 mil (Gate)
Φ ≥ 0.3 mm
Store in original container, in dry nitrogen,
< 6 months at an ambient temperature of 23 °C
D
B
D
A
DIE
B
C
SOURCE
WIREBONDABLE
D
E
GATE
F
WIREBONDABLE _G
mm
mil
4.35
171
4.35
171
3.30
130
1.75
69
0.24
9
0.46
18
0.57
22
August 2014
http://www.genesicsemi.com/high-temperature-sic/high-temperature-sic-bare-die/
Pg5 of 6