MB85R1002ANC-GE1 Datasheet, PDF (9/16 Pages) Fujitsu Component Limited. – 1 M Bit (64 K × 16)

MB85R1002A
■ TIMING DIAGRAMS
1. Read Cycle Timing (CE1, CE2 Control)
CE1
tRC
tCA1
tPC
CE2
LB, UB
A0 to A15
OE
I/O1 to I/O16
tCA2
tBS
tBP
tAS
tAH
Valid
H or L
tES
tRP
tCE1,
tCE2
tLZ
Invalid
tOH
Valid
tOHZ
Invalid
2. Read Cycle Timing (OE Control)
tCA1
CE1
CE2
LB, UB
A0 to A15
tBS
tAS
tAH
Valid
tCA2
tBP
H or L
tRC
OE
tRP
tPC
I/O1 to I/O16
tOE
tLZ
Invalid
tOH
Valid
tOHZ
Invalid
Hi-Z
Hi-Z
DS501-00004-1v0-E
9