MB89173 Datasheet, PDF (43/50 Pages) Fujitsu Component Limited. – 8-bit Proprietary Microcontroller

MB89170/170A/170L Series
Table 2 Transfer Instructions (48 instructions)
Mnemonic
~#
Operation
TL TH AH N Z V C OP code
MOV dir,A
3 2 (dir) ← (A)
– – – ––––
45
MOV @IX +off,A
4 2 ( (IX) +off ) ← (A)
– – – ––––
46
MOV ext,A
4 3 (ext) ← (A)
– – – ––––
61
MOV @EP,A
3 1 ( (EP) ) ← (A)
– – – ––––
47
MOV Ri,A
3 1 (Ri) ← (A)
– – – – – – – 48 to 4F
MOV A,#d8
2 2 (A) ← d8
AL – – + + – –
04
MOV A,dir
3 2 (A) ← (dir)
AL – – + + – –
05
MOV A,@IX +off
4 2 (A) ← ( (IX) +off)
AL – – + + – –
06
MOV A,ext
4 3 (A) ← (ext)
AL – – + + – –
60
MOV A,@A
3 1 (A) ← ( (A) )
AL – – + + – –
92
MOV A,@EP
3 1 (A) ← ( (EP) )
AL – – + + – –
07
MOV A,Ri
3 1 (A) ← (Ri)
AL – – + + – – 08 to 0F
MOV dir,#d8
4 3 (dir) ← d8
– – – ––––
85
MOV @IX +off,#d8 5 3 ( (IX) +off ) ← d8
– – – ––––
86
MOV @EP,#d8
4 2 ( (EP) ) ← d8
– – – ––––
87
MOV Ri,#d8
4 2 (Ri) ← d8
– – – – – – – 88 to 8F
MOVW dir,A
4 2 (dir) ← (AH),(dir + 1) ← (AL)
– – – ––––
D5
MOVW @IX +off,A 5 2 ( (IX) +off) ← (AH),
– – – ––––
D6
( (IX) +off + 1) ← (AL)
MOVW ext,A
5 3 (ext) ← (AH), (ext + 1) ← (AL)
– – – ––––
D4
MOVW @EP,A
4 1 ( (EP) ) ← (AH),( (EP) + 1) ← (AL) – – – – – – –
D7
MOVW EP,A
2 1 (EP) ← (A)
– – – ––––
E3
MOVW A,#d16
3 3 (A) ← d16
AL AH dH + + – –
E4
MOVW A,dir
4 2 (AH) ← (dir), (AL) ← (dir + 1)
AL AH dH + + – –
C5
MOVW A,@IX +off 5 2 (AH) ← ( (IX) +off),
AL AH dH + + – –
C6
(AL) ← ( (IX) +off + 1)
MOVW A,ext
5 3 (AH) ← (ext), (AL) ← (ext + 1)
AL AH dH + + – –
C4
MOVW A,@A
4 1 (AH) ← ( (A) ), (AL) ← ( (A) ) + 1) AL AH dH + + – –
93
MOVW A,@EP
4 1 (AH) ← ( (EP) ), (AL) ← ( (EP) + 1) AL AH dH + + – –
C7
MOVW A,EP
2 1 (A) ← (EP)
– – dH – – – –
F3
MOVW EP,#d16
3 3 (EP) ← d16
– – – ––––
E7
MOVW IX,A
2 1 (IX) ← (A)
– – – ––––
E2
MOVW A,IX
2 1 (A) ← (IX)
– – dH – – – –
F2
MOVW SP,A
2 1 (SP) ← (A)
– – – ––––
E1
MOVW A,SP
2 1 (A) ← (SP)
– – dH – – – –
F1
MOV @A,T
3 1 ( (A) ) ← (T)
– – – ––––
82
MOVW @A,T
4 1 ( (A) ) ← (TH),( (A) + 1) ← (TL)
– – – ––––
83
MOVW IX,#d16
3 3 (IX) ← d16
– – – ––––
E6
MOVW A,PS
2 1 (A) ← (PS)
– – dH – – – –
70
MOVW PS,A
2 1 (PS) ← (A)
– – – ++++
71
MOVW SP,#d16
3 3 (SP) ← d16
– – – ––––
E5
SWAP
2 1 (AH) ↔ (AL)
– – AL – – – –
10
SETB dir: b
4 2 (dir): b ← 1
– – – – – – – A8 to AF
CLRB dir: b
4 2 (dir): b ← 0
– – – – – – – A0 to A7
XCH A,T
2 1 (AL) ↔ (TL)
AL – – – – – –
42
XCHW A,T
3 1 (A) ↔ (T)
AL AH dH – – – –
43
XCHW A,EP
3 1 (A) ↔ (EP)
– – dH – – – –
F7
XCHW A,IX
3 1 (A) ↔ (IX)
– – dH – – – –
F6
XCHW A,SP
3 1 (A) ↔ (SP)
– – dH – – – –
F5
MOVW A,PC
2 1 (A) ← (PC)
– – dH – – – –
F0
Notes: • During byte transfer to A, T ← A is restricted to low bytes.
• Operands in more than one operand instruction must be stored in the order in which their mnemonics
are written. (Reverse arrangement of F²MC-8 family)
43