MB88111 Datasheet, PDF (4/26 Pages) Fujitsu Component Limited. – A/D Converter (With 24-Channel Input at 10-bit Resolution)

MB88111
s PIN DESCRIPTION
Pin no.
QFP
DIP
Symbol I/O Circuit type
Descriptions
41 to 26 2 to 1, AN0 to AN15 I
48 to 43,
41 to 34
25 to 18 33 to 31, AN16 to
29 to 25 AN23
F
Analog input pins. The pin to be subject to conversion
is selected by the command input through the SIN pin.
Also, a series of pins from AN16 to AN23 can be used
G
as a port input.
12
19 MOD
I
A
Pin for selecting a serial data output mode:
“L”: Mode A for output from the SOT pin in
synchronization with the fall of the SCK signal.
“H”: Mode B for output from the SOT pin in
synchronization with the rise of the SCK signal.
11
17 CS1
10
16 CS2X
I
A
Input pins for selecting an extended serial interface
mode.
Setting the CS1 level to “H” and the CS2X level to “L”
enables A/D converted data transfer. Setting the CS1
level to “L” or the CS2X level to “H” clears the register
command without affecting A/D conversion. Serial
data input to the external extended serial input pin
ESIN is output to the SOT pin as it is. (See Section 7
“Extended Serial Interface” in “s OPERATION.”)
4
10 SIN
I
B
Serial data input pin
This pin is a hysteresis input with a filter.
6
12 SOT
O
H
Serial data output pin
3
9 CCLK
I
B
System clock input pin
This pin is a hysteresis input.
2
8 SCK
I
B
Serial data transfer clock input pin
This pin is a hysteresis input with a filter.
9
15 ATGX
I
C
External trigger input pin. This pin incorporates a pull-
up resistor. The ATC command initiates A/D conversion
at the rise of the signal at this pin.
The pin is a hysteresis input.
8
14 IRQX
O
H
A/D conversion interrupt signal input pin. The signal
level becomes “L” upon completion of A/D conversion;
it becomes “H” upon reception of data to be converted.
7
13 ENDC
O
H
A/D conversion completion signal output pin. The
signal level becomes “H” upon completion of A/D
conversion; it becomes “L” upon reception of data to be
converted.
5
11 ESIN
I
A
Serial input extension input pin. When the CS1 level is
“L” or the CS2X level is “H,” data input to the ESIN pin
is output to the SOT pin as it is.
1
7 RSTX
I
D
Reset signal input pin. This pin incorporates a pull-up
resistor. Setting the signal level to “L” initializes the
internal circuit of the device.
This pin is a hysteresis input with a filter.
(Continued)
4