MB85R2001_08 Datasheet, PDF (4/16 Pages) Fujitsu Component Limited. – Memory FRAM CMOS 2 M Bit (256 K × 8)

MB85R2001
■ FUNCTION TRUTH TABLE
Operation Mode
CE1 CE2 WE OE
I/O1 to I/O8 Supply Current
Standby Pre-charge
H
X
X
X
X
L
X
X
X
X
H
H
High-Z
Standby
(ISB)
Read
H
H
L
L
Read
(Pseudo-SRAM, OE control*¹)
L
H
H
Write
H
L
H
L
Write
(Pseudo-SRAM, WE control*²)
L
H
H
Dout
Din
Operation
(ICC)
L = VIL, H = VIH, X can be either VIL or VIH, High-Z = High Impedance
: Latch address and latch data at falling edge, : Latch address and latch data at rising edge
*1 : OE control of the Pseudo-SRAM means the valid address at the falling edge of OE to read.
*2 : WE control of the Pseudo-SRAM means the valid address and data at the falling edge of WE to write.
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