MB91220 Datasheet, PDF (27/88 Pages) Fujitsu Component Limited. – 32-bit Microcontroller

MB91220/S Series
■ MODE SETTINGS
The FR family, sets the operation mode using mode pins (MD2 to MD0) and mode data.
• Mode pins
The mode pins (MD2 to MD0) specify how the mode vector fetch and reset vector fetch is performed.
Other settings than these in the table are prohibited.
MD2
Mode pin
MD1
MD0
Mode name
Reset vector access area
0
0
0
Internal ROM mode vector
Internal
• Mode data
Data written to the internal mode register (MODR) by mode vector fetch is called mode data.
After an operating mode has been set in the mode register the device operates in that operating mode.
The mode data is set by all reset sources. User programs cannot set data to the mode register.
Details of mode data
bit31
0
bit30
0
bit29
0
bit28
0
bit27
0
bit26 bit25 bit24
ROMA WTH1 WTH2
Operating mode
setting bits
Bit 31 to bit 27 are reserved.
Always set the value to “00000B”. Otherwise, the operation is not guaranteed.
[bit26] ROMA (Internal ROM enabling bit)
This bit specifies whether to enable internal ROM area.
ROMA
Function
Remarks
Internal F-bus RAM is enabled, and the internal
0
External ROM mode
ROM area (80000H to 100000H) becomes an
external area.
1
Internal ROM mode
Internal ROM area is enabled.
[bit25, bit24] WTH1, WTH0 (bus width setting bits)
Specify the bus width for the external bus mode.
In the external bus mode, this value is set to DBW1 and DBW0 bits in ACR0 (CS0 area).
WTH1
WTH0
Function
0
0
8-bit bus width
0
1
16-bit bus width
1
0
⎯
1
1
Single chip mode
27