MB39C308 Datasheet, PDF (20/60 Pages) Fujitsu Component Limited. – 6ch DC/DC Converter IC for LPIA Platform VR

MB39C308
■ PROTECTION
<1> Under Voltage Lock Out Protection (UVLO)
The UVLO prevents IC malfunctions or system damage and the degradation caused by the excessive voltage
or instantaneous voltage drop of the power supply voltage (AVDD), bias voltage (VB), internal reference voltage
(VREF).
The UVLO turns off all the high- and low-side FETs of CH1 to CH6 when the AVDD pin drops below 5.0 V(Typ).
The UVLO is released when the AVDD pin is above 5.1 V (Typ). This is the non-latch type protection.
<2> Input Over Voltage Protection (IVP)
The circuit prevents IC malfunctions or system damage and the degradation caused by the excessive voltage
or instantaneous voltage drop of the power supply voltage (AVDD).
The IVP turns off all the high- and low-side FETs of CH1 to CH6 when the AVDD pin exceeds 13.0 V(Typ). The
IVP is released when the AVDD pin drops below 12.85 V (Typ). This is the non-latch type protection.
<3> Over Temperature Protection (OTP)
The OTP prevents thermal damages on ICs. The IVP function turns off all the high- and low-side FETs of CH1
to CH6 when the junction temperature exceeds +150 °C (Typ). The OPT is released when the temperature drops
below +125 °C (Typ). This is the non-latch type protection.
<4> Output Short Circuit Protection (SCP)
The SCP function stops outputting data when the output voltage falls and protects the devices connected to
outputs.
The SCP timer will start to count when either of output voltages CH1 to CH6 falls due to the output short-circuit
to GND or excessive currents. The SCP function starts to operate the latch protection and turns off all the high-
and low-side FETs when the output voltage continues to fall to 1.4 ms (Typ).
Follow either of the steps to release the latch of output short circuit protection.
- After all of CTL signals from CH1 to CH6 are set to “L” level, turn on the each CTL signal again.
- When the voltage of the AVDD pin is below the threshold voltage of the UVLO, and then the voltage of the
AVDD pin becomes higher than the threshold voltage of UVLO again, the each output will start up.
<5> Output Over Voltage Protection (OVP)
The OVP protects the devices which are connected to outputs when the output voltage rises. When either output
voltage of the CH1 to CH6 is higher than 120% of each channel's preset voltage (Typ), the OVP turns off all the
high- and low-side FETs of the channels (However, the only CH4 is turned off the high-side FET and turned on
the low-side FET. The CH4 logic is different from other channels as it is controlled with PWM). The OVP is
released when the output voltage is below 103% of the preset voltage (Typ). This is the non-latch type protection.
<6> Over Current Protection (OCP)
The OCP function controls the output current. When drain-to-source current excessively increases, the OCP
controls the output current to the preset value for each channel. Then, because of the OCP functions, the output
voltage usually drops. As a result, the SCP stop the all outputs with the latch setting.
The OCP functions only for the corresponding channels only, however, the SCP stops all of the channels in the
end.
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DS04-27261-6E