MB3836 Datasheet, PDF (18/28 Pages) Fujitsu Component Limited. – Li-Ion Battery Protection IC

MB3836
3. Over-discharge Detection/Power Fail Circuit
• When no “H” level signal is input to the PDWN terminal after over-discharge detection
If any cell voltage becomes the over-discharge detection voltage (2.75 V Typ), the PF terminal (pin 19) outputs
a “L” level PF signal to the notebook PC after a PF output delay time (2 s Typ) managed by the capacitor (CUVT)
connected between the CUVT terminal (pin 12) and GND. At the same time, after a power-down delay time
(20 s Typ) managed by the capacitor (CPDT) connected between the CPDT terminal (pin 11) and GND, the DOUT
terminal (pin 3) goes “H” level to turn off the Pch MOS FET for external discharge control, thereby stopping
discharging the battery. The VS terminal (pin 5) goes “L” level at this time. As discharging is stopped, the OCV
terminal (pin 1) goes “L” level to completely turn off the bias source in the IC.
That is, an over-discharge state is detected when a cell voltage does not return to the over-discharge detection
voltage (2.75 V Typ) or more within the power-down delay time (20 s Typ), an over-discharge state is detected.
When the OCV terminal (pin 1) goes “H” level, the DOUT terminal (pin 3) goes “L” level to turn on the Pch MOS
FET for external discharge control and the VS terminal (pin 5) goes “H” level. If the cell voltage remains not
exceeding the over-discharge detection voltage (2.75 V Typ) at this time, the PF terminal (pin 19) outputs a “L”
level PF signal to the notebook PC again after a PF output delay time (2 s Typ) managed by the capacitor (CUVT)
connected between the CUVT terminal (pin 12) and GND. If the cell voltage reaches or exceeds the over-
discharge detection voltage (2.75 V Typ) within the power-down delay time (20 s Typ), however, the PF terminal
goes “H” level and an over-discharge state is not detected.
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