MB4053 Datasheet, PDF (13/17 Pages) Fujitsu Component Limited. – 6-Channel 8-BIT A/D Converter

MB4053
s USAGE PRECAUTIONS
1. Shince the impedance of the ramp capacitor pin is approximately 30 MΩ (high), a resistance must not be con-
nected in paralleled with this input. A ramp capacitor with no leakage must be used.
2. At VIN = 0 V, tR has a finite value.
3. Since RAMP STOP is an open collector output, an external pull-up resistor is required. (For example, when a
20 kΩ external pull-up resistor is used.)
4. All digital inputs/output are TTL compatible.
5. The time from RAMP START input switching (0 →1) to RAMP STOP output switching (1 → 0) is ramp time tR.
6.
tSL ≥ tA (max) =
CH
150 µA –1R
× (VREF + 0.7 V)
7.
tR ^.=.
CH
IR
×
VIN, tR (max) ^.=.
CH
1R
× VREF
8.
IR =
VCC – VREF
RREF
9. 2 V ≤ VREF ≤ (VCC – 2 V) and VREF ≤ 5.25 V
10.While and analog input voltage is being sampled, channel selection signals A0, A1, and A2 must not be
changed for (tSL).
11.When IR is little, Linearity Error extends. However, Linearity Error is ±0.2 [% of FSR] or less in IR (min) = 12 µA.
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