MB85RS1MTPNF-G Datasheet, PDF (12/40 Pages) Fujitsu Component Limited. – 1M (128 K × 8) Bit SPI

MB85RS1MT
• SLEEP
The SLEEP command shifts the LSI to a low power mode called “SLEEP mode”. The transition to the SLEEP
mode is carried out at the rising edge of CS after operation code in the SLEEP command. However, when
at least one SCK clock is inputted before the rising edge of CS after operation code in the SLEEP command,
this SLEEP command is canceled.
After the SLEEP mode transition, SCK and SI inputs are ignored and SO changes to a Hi-Z state.
CS
SCK
Enter Sleep Mode
01234567
SI Invalid 1 0 1 1 1 0 0 1 Invalid
SO
Hi-Z
Sleep Mode Entry
Returning to an normal operation from the SLEEP mode is carried out after tREC (Max 400 μs) time from the
falling edge of CS (see the figure below). It is possible to return CS to H level before tREC time. However, it
is prohibited to bring down CS to L level again during tREC period.
CS
CS
tREC
From this time
Command input enable
Exit Sleep Mode
Sleep Mode Exit
■ BLOCK PROTECT
Writing protect block for WRITE command is configured by the value of BP0 and BP1 in the status register.
BP1
BP0
Protected Block
0
0
None
0
1
18000H to 1FFFFH (upper 1/4)
1
0
10000H to 1FFFFH (upper 1/2)
1
1
00000H to 1FFFFH (all)
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DS501-00022-6v0-E