MB15F78SP Datasheet, PDF (10/27 Pages) Fujitsu Component Limited. – Dual Serial Input PLL Frequency Synthesizer

MB15F78SP
• Prescaler Data Setting
Divide ratio
Prescaler divide ratio TX-PLL
Prescaler divide ratio RX-PLL
SW = “H”
16/17
32/33
SW = “L”
32/33
64/65
• Charge Pump Current Setting
Current value
CS
±6.0 mA
1
±1.5 mA
0
• LD/fout Output Select Data Setting
LD/fout output signal
LDS
fout signal
1
LD signal
0
• Test Purpose Bit Setting
LD/fout pin state
T1
T2
Outputs frTX.
0
0
Outputs frRX.
1
0
Outputs fpTX.
0
1
Outputs fpRX.
1
1
• Phase Comparator Phase Switching Data Setting
Phase comparator input
FC = “H”
DoTX/DoRX
fr > fp
H
fr < fp
L
fr = fp
Z
Z : High-impedance
FC = “L”
DoTX/DoRX
L
H
Z
Depending upon the VCO and LPF polarity, FC bit should be set.
High
(1) VCO polarity FC = “H”
(2) VCO polarity FC = “L”
VCO Output
Frequency
Note : Give attention to the polarity for using active type LPF.
10
LPF Output voltage
(1)
(2)
Max.