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FA7622CP Datasheet, PDF (7/8 Pages) Fuji Electric – Bipolar IC For Switching Power Supply Control
FA7622CP(E)
6. IC ON/OFF control circuit
This control circuit turns the entire IC ON or OFF by an
external signal using an ON/OFF control pin to limit the IC’s
current consumption to 10µA or less.
Figure 13 shows the IC ON/OFF control circuit and Fig. 14
shows its timing.
To turn the IC OFF, this circuit clamps OUT1 (OUT2) to
ground when the ON/OFF pin voltage is controlled to less than
0.60V. The internal bias current is cut off to turn off the
switching transistor.
To turn the IC ON, raise the ON/OFF pin voltage immediately
to 3.0V or more to charge the soft-start capacitor gradually.
7. Voltage boost circuit
By using the circuit shown in Fig. 15, this IC generates a
voltage 6.5V (typ.) higher than the VCC1 input voltage at the
VCC2 pin. This circuit allows the IC to drive MOSFET gates
directly. With this circuit, the IC can drive a low-level side
N-channel MOSFET at 3.6 to 18V as VCC1 (not possible with
conventional ICs). In addition, an N-channel MOSFET can be
used on the high-level side of a buck chopper. In Fig. 15, the
inductor (L) is about 100µH or more and the capacitor (Cup)
should be greater than about 0.1µF.
If voltage boost is not necessary, connect the VCC1 and VCC2
pins directly, and SW pin must be opened.
8. Undervoltage lock-out circuit
This circuit prevents a malfunction at a low supply voltage.
When the supply voltage VCC1 rises and reaches 3.0V, this
circuit is activated. When VCC1 drops below 2.9V, this circuit
clamps OUT1 (OUT2) to ground. The CP pin voltage is reset
to low by means of cutting off a power supply input.
9. Output circuit
As Fig. 17 shows, OUT1 and OUT2 with a totempole
structure can drive a MOSFET.
Since both the maximum output source and sink currents are
600mA, a MOSFET can be switched at high speed.
ON/OFF
Ϫ
3.0V Ï©
0.6V
ID
OUT1
(OUT2)
ON/OFF
Fig. 13
Voltage waveforms
OUT1
(OUT2)
Fig. 14 Control of output
VCC1
14
L
D
SW VCC2
13
12
3.0V
0V
Time
CUP
REGULATOR
Fig. 15
VCC2
OUT1
(OUT2)
GND
Fig. 16
7