FA5640 Datasheet, PDF (26/35 Pages) Fuji Electric – Fuji Switching Power Supply Control IC

FA5640/41/42
Advice for designing
Immediately before the MOSFET is turned on, the
MOSFET drain-source voltage is resonated due to the
transformer inductance and the resonance capacitor Cd.
Adjust C1 to allow the MOSFET to be turned on at the
valley of this resonance (See Figs. 16 and 17).
Since overvoltage threshold voltage is 5.7 V (min.), select
resistance R1 not to allow the ZCD pin voltage to exceed
5.7 V, or allow the ZCD pin current to exceed the absolute
maximum rating, in normal operation, ensuring that the
following calculation formulae are satisfied.
VZCD=VthOVP×VNs / VOVP
where,
VZCD: ZCD pin voltage at normal operation
VthOVP: ZCD pin overvoltage threshold level (6 V)
VNs: Line voltage secondary winding of transformer at
normal operation (Vo  VF)
VOVP: Output voltage to be subjected to overvoltage
latch-off
VNsub=VNs×Nsub / Ns
where,
VNsub: Line voltage of auxiliary winding of transformer
Nsub: Number of turns of auxiliary windings of transformer
NS: Number of turns of secondary windings of transformer
Using the formula
VZCD=VNsub×RZCD / (R1＋RZCD) _,
R1 is found to be
ISoZCD: ZCD pin input current (source current = 2.0 mA)
Generally, R1 is around several tens k, whereas C1 is
around several tens pF. If timing of bottom detection is OK,
C1 need not be connected.
Add Schottky diode between ZCD-GND as shown in Figure
17 when the terminal ZCD input current is not filled even if
R1 is appropriately adjusted.
If R1 and C1 constants are not appropriate, overvoltage
protection may not function properly. Figure 18 shows the
ZCD pin waveform at the time of overvoltage protection.
With the upper ZCD pin waveform, overvoltage on the
secondary side is detected properly, and latch-off is
performed by fault protection. Meanwhile, with the lower
ZCD pin waveform, protective function is not operated
because the threshold voltage is not reached in 4.5 s. In
this case, adjust R1 and C1.
Vo
0V
60us ^Latch
4.5us
6.0V
zcd
pin
0V
Fig.15 ZCD pin waveform at overvoltage on the
secondary side
R1=VNsub×RZCD / VZCD－RZCD
where,
RZCD: Internal resistance of ZCD pin (30 k)
If the capacitance of capacitor C1 is to be increased to
prevent malfunction due to surge, for example, it may be
necessary to decrease the resistance R1 for bottom
detection of the auxiliary winding. If the overvoltage
detection level decreases as a result, add resistance R2 for
adjustment.
In this case, the following formula applies:
Vds
Fig.16 Vds waveform
VF
VNs
Vo
Np
Ns
R1= ^RZCD×R2
RZCD+R2
VNsub
VZCD
－1
Since the source current of the ZCD pin input current
(absolute maximum rating) is 2.0 mA, the following
formula must be satisfied at the same time:
R1>√2×VAC(max)×Nsub / Np / ISoZCD
RZCD
30kΩ
ZCD
VZCD
1
7.5V ^{C1 D1}
Cd
VNsub
R1
R2 _Nsub
Fig.17 ZCD pin resistance R1 calculation
where,
Fuji Electric Co., Ltd.
AN-064E Rev.1.1
April 2011
26
http://www.fujielectric.co.jp/products/semiconductor/