FA5546 Datasheet, PDF (23/27 Pages) Fuji Electric – Switching Power Supply Control IC

FA5546/47
(3) Gate drive circuit
To adjust switching speed and prevent vibration of the gate
terminal, a resistor is connected between the MOSFET
gate terminal and the OUT terminal of the IC in general.
In some cases, driving current for turning on the MOSFET
and that for turning it off are required to be determined
separately.
In this case, connect a gate drive circuit shown in Fig.26 or
27 between the gate terminal of the MOSFET and the OUT
terminal.
In Fig.26, the current is limited by R1 and R2 when the
power is turned on, while the current is limited only by R2
when it is turned off.
In Fig.27, the current is limited only by R1 when the power
is turned on, while the current is limited by R1 and R2
connected in parallel when the power is turned off.
Q1
5
OUT ^{R1 R2}
Fig. 26 Gate drive circuit (1)
R2
Q1
5
OUT ^R1
Fig. 27 Gate drive circuit (2)
Fig. 28 Latch shutdown function by an external signal
(5) Feedback
Fig.29 shows the circuit configuration of the FB terminal.
A photo-coupler PC is connected as a feedback circuit that
monitors the output voltage and performs PWM control.
This signal gives threshold voltage for the current
comparator. Consequently, if noise is added to this signal,
the output pulses are disturbed. Capacitor C4 is generally
connected for protection against noise.
2
FB
PC
C4
Fig. 29 FB terminal circuit configuration
(4) LAT terminal
• To perform overheat protection using an NTC thermistor
As shown in Fig.17, thermistor TH1 is connected to the LAT
terminal to perform overheat protection (latch shutdown).
Since the LAT terminal source current is 60A (min.), select
TH1 whose resistor Rth satisfies the following expression at
the desired overheat protection temperature. If temperature
setting for overheat protection is not feasible with TH1 only,
connect an additional resistor in series for adjustment.
Rth  1.00V / 60A  16.7k
• To perform latch shutdown using an independent
abnormality detection signal
To perform latch shutdown with an external signal, connect
a peripheral circuit, allowing the LAT terminal voltage to be
kept below 1.0V. Fig.28 shows a typical circuit connection.
Fuji Electric Co., Ltd.
AN-027E Rev.0.4
April -2011
23
http://www.fujielectric.co.jp/products/semiconductor/