FA7703 Datasheet, PDF (16/21 Pages) Fuji Electric – FUJI Power Supply Control IC

FA7703/04
FA7703/7704
10. Design advice
(1)Setting oscillation frequency
As described in “(2) Oscillator” of “Description
of each circuit”, any desired oscillation frequency
can be obtained by setting the value of the
resistor connected to RT terminal. (Fig. 1) The
desired oscillation frequency should be set
between 50kHz and 1MHz. The oscillation
frequency to RT can be obtained from the chart
of “Oscillation frequency vs. timing resistor”
characteristic curves or by calculating with the
formulas below.
fosc = 3×10³ × RT ^-0.907
RT
=
⎜⎜⎝⎛
3×10³
fosc
⎟⎟⎠⎞^1.1
where, fosc: Oscillation frequency [kHz]
RT: Timing resistor [kΩ]
These formulas can only be used for rough
calculation; accordingly, be careful when
designing, because the value obtained is not
guaranteed. The operation frequency varies due
to the conditions of the tolerance of IC influence
for noises, or external discrete components etc.
When determining the values, be sure to verify
the effectiveness of the values you calculated in
an actual circuit operation.
Because it is easily affected by noises by the
high impedance, the resistor RT should be
connected as shortly as possible near RT
terminal and GND terminal,
(2)Operation around the maximum or the
minimum output duty cycle
As described in the charts of “FB terminal
voltage vs. output duty cycle”, “DT terminal
voltage vs. output duty cycle”, “CS terminal
voltage vs. output duty cycle” characteristic
curves, the output duty of FA7703/04 changes
sharply around the minimum and the maximum
output duty. This phenomenon occurs more
conspicuously when operating in a high
frequency (i.e. when the pulse width is narrow).
Cautious care must be taken when using high
frequency.
(3)Determining soft start period
The time from the start of charging CS terminal
to n% output duty cycle can be roughly
calculated by the following expression.
ts[s] = ^{VCSn × CCS}
ICS
where, VCSn: CS terminal voltage in the output
duty of n% [V]
CCS: Capacitance of capacitor of CS terminal
[μF]
ICS: Output source current of CS terminal [μA]
2.2μΑ (typ.)
VCSn represents the voltage of CS terminal in
the output duty of n%, and it changes according
to the operation frequency. The value is obtained
simply from the chart of “CS terminal voltage vs.
output duty cycle” characteristic curves.
Since the output source current of CS terminal
is 2.2μΑ, which it is rather small, if the capacitor
has leak current, then the period of soft start (ts)
is easily affected. Therefore, cautious care must
be taken when determining the value.
Charging of CS terminal begins after UVLO is
cancelled. Note that the time from power-on of
Power supply to start of charging Ccs is t0 which
is not zero as described in Fig. 8. be careful.
To reset the soft start function, the voltage of
CS terminal is discharged with FA7703/04’s
internal switch triggered by lowering the voltage
of Power supply below the voltage of UVLO
(1.85V, typ.). If Power supply restarts before the
voltage is sufficiently discharged, the soft start
function might not properly operate. accordingly,
cautious care must be taken about it.
Vcc
Threshold
voltage
VCSn
CS terminal voltage
t0
ts
t0 : Time from power-on of VCC to reaching
unlock voltage of UVLO
Fig.8
Fuji Electric Systems Co., Ltd.
AN-057E Rev.1.0
Jun-2010
16
http://www.fujielectric.co.jp/fdt/scd/