UMFT221XE Datasheet, PDF (6/18 Pages) Future Technology Devices International Ltd. – UMFT221XE USB to 8-bit SPI/FT1248 Development Module

UMFT221XE
Version 1.0
Document Reference No.: FT_000651 Clearance No.: FTDI# 293
4.3 CBUS Signal Options
The following options can be configured on the CBUS I/O pins. These options are all configured in the
internal MTP ROM using the utility software FT_PROG, which can be downloaded from the
www.ftdichip.com. The default configuration is described in Section 9.
CBUS Signal
Option
Available On CBUS Pin
Description
Tristate
CBUS3
IO Pad is tri-stated
DRIVE_1
CBUS3
Output a constant 1
DRIVE_0
CBUS3
Output a constant 0
PWREN#
CBUS3
Output is low after the device has been configured by USB, then
high during USB suspend mode. This output can be used to control
power to external logic P-Channel logic level MOSFET switch.
NOTE: This function is driven by an open-drain to ground with no
internal pull-up, this is specially designed to aid battery charging
applications. UMFT221XE connects an on board 47K pull-up on all
CBUS and DBUS lines.
TXLED#
CBUS3
Transmit data LED drive – open drain pulses low when transmitting
data via USB.
RXLED#
CBUS3
Receive data LED drive – open drain pulses low when receiving data
via USB.
TX&RXLED#
CBUS3
LED drive – open drain pulses low when transmitting or receiving
data via USB.
SLEEP#
CBUS3
Goes low during USB suspend mode. Typically used to power down
an external logic. De-activate SLEEP# option for when connected to
a dedicated charger port, this can be selected when configuring the
MTP ROM. When this option is enabled SLEEP# is driven high when
FT221X is connected to a Dedicated Charger Port.
CLK24MHz
CBUS3
24 MHz Clock output.**
CLK12MHz
CBUS3
12 MHz Clock output.**
CLK6MHz
CBUS3
6 MHz Clock output.**
GPIO
CBUS3
CBUS bit bang mode option. Allows up to 4 of the CBUS pins to be
used as general purpose I/O. Configured individually for CBUS0,
CBUS1, CBUS2 and CBUS3 in the internal MTP ROM. A separate
application note, AN232R-01, available from FTDI website
(www.ftdichip.com) describes in more detail how to use CBUS bit
bang mode.
BCD_Charger
CBUS3
Battery Charge Detect indicates when the device is connected to a
dedicated battery charger host. Active high output. NOTE: Requires
a 10K pull-down to remove power up toggling.
BCD_Charger#
CBUS3
Active low BCD Charger, driven by an open drain to ground with no
internal pull-up (4.7K on board pull-up present).
BitBang_WR#
CBUS3
Synchronous and asynchronous bit bang mode WR# strobe output.
BitBang_RD#
CBUS3
Synchronous and asynchronous bit bang mode RD# strobe output.
VBUS Sense
CBUS3
Input to detect when VBUS is present.
Time Stamp
CBUS3
Toggle signal which changes state each time a USB SOF is received
Keep_Awake#
CBUS3
Table 4.2 – CBUS Signal Options
Active Low input, prevents the chip from going into suspend.
**When in USB suspend mode the outputs clocks are also suspended.
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