FT2232H Datasheet, PDF (14/60 Pages) Future Technology Devices International Ltd. – DUAL HIGH SPEED USB TO MULTIPURPOSE UART

Document No.: FT_000061
FT2232H DUAL HIGH SPEED USB TO MULTIPURPOSE UART/FIFO IC
Datasheet Version 2.05
Clearance No.: FTDI#77
3.4.4 FT2232H pins used in a Synchronous or Asynchronous Bit-Bang Interface
The FT2232H channel A or channel B can be configured as a synchronous or asynchronous bit-bang
interface. Bit-bang mode is a special FTDI FT2232H device mode that changes the 8 IO lines on either (or
both) channels into an 8 bit bi-directional data bus. There are two types of bit-bang modes: synchronous and
asynchronous.
When configured in any bit-bang mode, the pins used and the descriptions of the signals are shown in Table
3.7
Channel A
Pin No.
Channel B
Pin No.
Name
Type
Configuration Description
24,23,22,21,
19,18,17,16
46,45,44,43,
41,40,39,38
Channel A = ADBUS[7:0]
Channel B = BDBUS[7:0]
I/O
D7 to D0 bidirectional Bit-Bang parallel I/O
data pins
27
52
WRSTB#
OUTPUT
Write strobe, active low output indicates
when new data has been written to the
I/O pins from the Host PC (via the USB
interface).
28
53
RDSTB#
OUTPUT
Read strobe, this output rising edge
indicates when data has been read from
the parallel I/O pins and sent to the Host
PC (via the USB interface).
30
55
SIWU
INPUT
The Send Immediate / WakeUp signal
combines two functions on a single pin. If
USB is in suspend mode (PWREN# = 1) and
remote wakeup is enabled in the EEPROM ,
strobing this pin low will cause the device to
request a resume on the USB Bus. Normally,
this can be used to wake up the Host PC.
During normal operation (PWREN# = 0), if
this pin is strobed low any data in the device
TX buffer will be sent out over USB on the
next Bulk-IN request from the drivers
regardless of the pending packet size. This
can be used to optimize USB transfer speed
for some applications. Tie this pin to VCCIO
if not used.
Table 3.7 Channel A and Channel B Synchronous or Asynchronous Bit-Bang Configured Pin Descriptions
For a functional description of this mode, please refer to section 4.10 Synchronous and Asynchronous Bit-
Bang Interface Mode Description.
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