MCIMX25_1004 Datasheet, PDF (95/144 Pages) Freescale Semiconductor, Inc – i.MX25 Applications Processor for Consumer and Industrial Products

PWM Source Clock
PWM Output
1
2a
2b
3a
4a
Figure 67. PWM Timing
Table 71. PWM Output Timing Parameter
Ref No.
Parameter
1
System CLK frequency¹
2a
Clock high time
2b
Clock low time
3a
Clock fall time
3b
Clock rise time
4a
Output delay time
4b
1 _{CL of PWMO = 30 pF}
Output setup time
Minimum
0
12.29
9.91
—
—
—
8.71
3b
4b
Maximum
ipg_clk
—
—
0.5
0.5
9.37
—
Unit
MHz
ns
ns
ns
ns
ns
ns
3.7.14 Subscriber Identity Module (SIM) Timing
Each SIM module interface consists of a total of 12 pins (two separate ports, each containing six signals).
Typically a port uses five signals.
The interface is designed to be used with synchronous SIM cards, meaning the SIM module provides the
clock used by the SIM card. The clock frequency is typically 372 times the Tx/Rx data rate; however, the
SIM module can also work with CLK frequencies of 16 times the Tx/Rx data rate.
There is no timing relationship between the clock and the data. The clock that the SIM module provides
to the SIM card is used by the SIM card to recover the clock from the data in the same manner as standard
UART data exchanges. All six signals (five for bidirectional Tx/Rx) of the SIM module are asynchronous
with each other.
There are no required timing relationships between signals in normal mode. The SIM card is initiated by
the interface device; the SIM card responds with Answer to Reset. Although the SIM interface has no
defined requirements, the ISO/IEC 7816 defines reset and power-down sequences (for detailed
information see ISO/IEC 7816).
i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 3
Freescale Semiconductor
95