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56F8355_09 Datasheet, PDF (86/172 Pages) Freescale Semiconductor, Inc – 16-Bit Digital Signal Controllers | |||
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5.6.6.1 Quadrature Decoder 1 INDEX Pulse Interrupt Priority Level (DEC1_XIRQ
IPL)âBits 15â14
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2.
They are disabled by default.
⢠00 = IRQ disabled (default)
⢠01 = IRQ is priority level 0
⢠10 = IRQ is priority level 1
⢠11 = IRQ is priority level 2
5.6.6.2 Quadrature Decoder 1 HOME Signal Transition or Watchdog Timer
Interrupt Priority Level (DEC1_HIRQ IPL)âBits 13â12
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2.
They are disabled by default.
⢠00 = IRQ disabled (default)
⢠01 = IRQ is priority level 0
⢠10 = IRQ is priority level 1
⢠11 = IRQ is priority level 2
5.6.6.3 SCI1 Receiver Full Interrupt Priority Level (SCI1_RCV IPL)â
Bits 11â10
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2.
They are disabled by default.
⢠00 = IRQ disabled (default)
⢠01 = IRQ is priority level 0
⢠10 = IRQ is priority level 1
⢠11 = IRQ is priority level 2
5.6.6.4 SCI1 Receiver Error Interrupt Priority Level (SCI1_RERR IPL)â
Bits 9â8
This field is used to set the interrupt priority level for IRQs. This IRQ is limited to priorities 0 through 2.
They are disabled by default.
⢠00 = IRQ disabled (default)
⢠01 = IRQ is priority level 0
⢠10 = IRQ is priority level 1
⢠11 = IRQ is priority level 2
56F8355 Technical Data, Rev. 17
86
Freescale Semiconductor
Preliminary
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