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MC9S08QA4 Datasheet, PDF (8/32 Pages) Freescale Semiconductor, Inc – 8-bit HCS08 Central Processor Unit (CPU) | |||
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Electrical Characteristics
Table 6. DC Characteristics (Temperature Range = â40 to 85°C Ambient) (continued)
Parameter
Symbol
Min
Typical
Max
Unit
Power on reset (POR) re-arm voltage
(VDD rising)
Bandgap voltage reference
Input high voltage (VDD > 2.3 V) (all digital inputs)
Input high voltage (1.8 V ⤠VDD ⤠2.3 V) (all digital inputs)
Input low voltage (VDD > 2.3 V) (all digital inputs)
Input low voltage (1.8 V ⤠VDD ⤠2.3 V) (all digital inputs)
Input hysteresis (all digital inputs)
Input leakage current (per pin)
VIn = VDD or VSS, all input-only pins
High impedance (off-state) leakage current (per pin)
VIn = VDD or VSS, all input/output
Internal pullup resistors3,4
Internal pulldown resistor (KBI)
Output high voltage â low drive (PTxDSn = 0)
IOH = â2 mA (VDD ⥠1.8 V)
Output high voltage â high drive (PTxDSn = 1)
IOH = â10 mA (VDD ⥠2.7 V)
IOH = â6 mA (VDD ⥠2.3 V)
IOH = â3 mA (VDD ⥠1.8 V)
Maximum total IOH for all port pins
Output low voltage â low drive (PTxDSn = 0)
IOL = 2.0 mA (VDD ⥠1.8 V)
Output low voltage â high drive (PTxDSn = 1)
IOL = 10.0 mA (VDD ⥠2.7 V)
IOL = 6 mA (VDD ⥠2.3 V)
IOL = 3 mA (VDD ⥠1.8 V)
Maximum total IOL for all port pins
DC injection current 2, 5, 6, 7
VIn < VSS, VIn > VDD
Single pin limit
Total MCU limit, includes sum of all stressed pins
Vpor
VBG
VIH
VIL
Vhys
|IIn|
|IOZ|
RPU
RPD
VOH
|IOHT|
VOL
IOLT
IIC
2.16
â
1.18
0.70 Ã VDD
0.85 Ã VDD
â
â
0.06 Ã VDD
â
â
17.5
17.5
VDD â 0.5
VDD â 0.5
â
â
â
â
â
â
â0.2
â5
2.19
1.4
1.20
â
â
â
â
â
0.025
0.025
â
â
â
â
â
â
â
â
â
â
â
â
â
â
2.27
â
V
1.21
V
â
V
â
0.35 Ã VDD
V
0.30 Ã VDD
â
V
1.0
μA
1.0
μA
52.5
kΩ
52.5
kΩ
â
V
â
â
â
60
mA
0.5
V
0.5
0.5
0.5
60
mA
0.2
mA
5
mA
Input capacitance (all non-supply pins)
CIn
â
â
7
pF
1 RAM will retain data down to POR voltage. RAM data not guaranteed to be valid following a POR.
2 This parameter is characterized and not tested on each device.
3 Measurement condition for pull resistors: VIn = VSS for pullup and VIn = VDD for pulldown.
4 PTA5/IRQ/TCLK/RESET pullup resistor may not pull up to the specified minimum VIH. However, all ports are functionally tested
to guarantee that a logic 1 will be read on any port input when the pullup is enabled and no DC load is present on the pin.
5 All functional non-supply pins are internally clamped to VSS and VDD.
MC9S08QA4 Series, Rev. 2
8
Freescale Semiconductor
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