K53P144M100SF2V2 Datasheet, PDF (79/85 Pages) Freescale Semiconductor, Inc – K53 Sub-Family

144 144
LQFP MAP
BGA
Pin Name
53 K7 PTA3
54 L7 PTA4/
LLWU_P3
55 M8 PTA5
Default
JTAG_TMS/
SWD_DIO
NMI_b/
EZP_CS_b
DISABLED
ALT0
TSI0_CH4
TSI0_CH5
ALT1
PTA3
PTA4/
LLWU_P3
PTA5
56 E7 VDD
VDD
VDD
57 G7 VSS
VSS
VSS
58 J7 PTA6
DISABLED
PTA6
59 J8 PTA7
60 K8 PTA8
ADC0_SE10 ADC0_SE10 PTA7
ADC0_SE11 ADC0_SE11 PTA8
61 L8 PTA9
DISABLED
PTA9
62 M9 PTA10
DISABLED
PTA10
63 L9 PTA11
DISABLED
PTA11
64 K9 PTA12
CMP2_IN0 CMP2_IN0 PTA12
65 J9 PTA13/
LLWU_P4
CMP2_IN1 CMP2_IN1 PTA13/
LLWU_P4
66 L10 PTA14
DISABLED
PTA14
67 L11 PTA15
DISABLED
PTA15
68 K10 PTA16
DISABLED
PTA16
69 K11 PTA17
ADC1_SE17 ADC1_SE17 PTA17
70 E8 VDD
71 G8 VSS
72 M12 PTA18
73 M11 PTA19
VDD
VDD
VSS
VSS
EXTAL0
EXTAL0
PTA18
XTAL0
XTAL0
PTA19
74 L12 RESET_b RESET_b RESET_b
75 K12 PTA24
DISABLED
PTA24
76 J12 PTA25
DISABLED
PTA25
77 J11 PTA26
DISABLED
PTA26
Pinout
ALT2
ALT3
ALT4
ALT5
ALT6
ALT7
EzPort
UART0_RTS_ FTM0_CH0
b
FTM0_CH1
JTAG_TMS/
SWD_DIO
NMI_b
EZP_CS_b
USB_CLKIN FTM0_CH2 RMII0_RXER/ CMP2_OUT I2S0_TX_
MII0_RXER
BCLK
JTAG_TRST_
b
SPI0_PCS0
SPI0_SCK
SPI0_SOUT
SPI0_SIN
FTM0_CH3
CLKOUT
FTM0_CH4
FTM1_CH0
FTM1_CH1 MII0_RXD3
FTM2_CH0 MII0_RXD2
FTM2_CH1 MII0_RXCLK
FTM1_CH0 RMII0_RXD1/
MII0_RXD1
FTM1_CH1 RMII0_RXD0/
MII0_RXD0
UART0_TX
RMII0_CRS_
DV/
MII0_RXDV
UART0_RX RMII0_TXEN/
MII0_TXEN
UART0_CTS_
b/
UART0_COL_
b
RMII0_TXD0/
MII0_TXD0
UART0_RTS_ RMII0_TXD1/
b
MII0_TXD1
FB_AD18
FB_AD17
FTM1_QD_
PHA
FB_AD16
FTM1_QD_
PHB
FB_AD15
FTM2_QD_
PHA
FB_OE_b
FTM2_QD_
PHB
FB_CS5_b/
FB_TSIZ1/
FB_BE23_16_
b
I2S0_TXD0
FB_CS4_b/
FB_TSIZ0/
FB_BE31_24_
b
I2S0_TX_FS
FB_AD31
I2S0_RX_
BCLK
FB_AD30 I2S0_RXD0
FB_AD29 I2S0_RX_FS
FB_AD28 I2S0_MCLK
TRACE_
CLKOUT
TRACE_D3
TRACE_D2
TRACE_D1
TRACE_D0
FTM1_QD_
PHA
FTM1_QD_
PHB
I2S0_TXD1
I2S0_RXD1
FTM0_FLT2 FTM_CLKIN0
FTM1_FLT0 FTM_CLKIN1
LPTMR0_
ALT1
MII0_TXD2
MII0_TXCLK
MII0_TXD3
FB_AD14
FB_AD13
FB_AD12
K53 Sub-Family Data Sheet, Rev. 1, 6/2012.
Freescale Semiconductor, Inc.
Preliminary
79
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