MCIMX31_07 Datasheet, PDF (77/108 Pages) Freescale Semiconductor, Inc – Multimedia Applications Processors

Electrical Characteristics
The DISP#_IF_CLK_PER_WR, DISP#_IF_CLK_PER_RD, HSP_CLK_PERIOD,
DISP#_IF_CLK_DOWN_WR, DISP#_IF_CLK_UP_WR, DISP#_IF_CLK_DOWN_RD,
DISP#_IF_CLK_UP_RD and DISP#_READ_EN parameters are programmed via the
DI_DISP#_TIME_CONF_1, DI_DISP#_TIME_CONF_2 and DI_HSP_CLK_PER Registers.
4.3.16 Memory Stick Host Controller (MSHC)
Figure 64, Figure 65, and Figure 66 depict the MSHC timings, and Table 48 and Table 49 list the timing
parameters.
tSCLKc
tSCLKwh
tSCLKwl
MSHC_SCLK
tSCLKr
tSCLKf
Figure 64. MSHC_CLK Timing Diagram
tSCLKc
MSHC_SCLK
MSHC_BS
tBSsu
tBSh
tDsu
tDh
MSHC_DATA
(Output)
tDd
MSHC_DATA
(Intput)
Figure 65. Transfer Operation Timing Diagram (Serial)
i.MX31/i.MX31L Advance Information, Rev. 2.3
Freescale Semiconductor
77