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MCIMX31C Datasheet, PDF (77/110 Pages) Freescale Semiconductor, Inc – Multimedia Applications Processors for Industrial and Automotive Products
Electrical Characteristics
Table 48. Asynchronous Serial Interface Timing Parameters—Access Level (continued)
ID
Parameter
Symbol
Min.
IP56 Controls setup time for write Tdcsw Tdicuw–1.5
IP57 Controls hold time for write
IP58 Slave device data delay8
IP59 Slave device data hold time8
Tdchw Tdicpw–Tdicdw–1.5
Tracc 0
Troh Tdrp–Tlbd–Tdicdr+1.5
IP60 Write data setup time
Tds Tdicdw–1.5
IP61 Write data hold time
IP62 Read period2
IP63 Write period3
IP64 Read down time4
IP65 Read up time5
IP66 Write down time6
IP67 Write up time7
IP68 Read time point9
Tdh Tdicpw–Tdicdw–1.5
Tdicpr Tdicpr–1.5
Tdicpw Tdicpw–1.5
Tdicdr Tdicdr–1.5
Tdicur Tdicur–1.5
Tdicdw Tdicdw–1.5
Tdicuw Tdicuw–1.5
Tdrp Tdrp–1.5
Typ.1
Tdicuw
Tdicpw–Tdicdw
—
—
Tdicdw
Tdicpw–Tdicdw
Tdicpr
Tdicpw
Tdicdr
Tdicur
Tdicdw
Tdicuw
Tdrp
Max.
Units
—
ns
—
ns
Tdrp9–Tlbd10–Tdicur–1.5 ns
Tdicpr–Tdicdr–1.5
ns
—
ns
—
ns
Tdicpr+1.5
ns
Tdicpw+1.5
ns
Tdicdr+1.5
ns
Tdicur+1.5
ns
Tdicdw+1.5
ns
Tdicuw+1.5
ns
Tdrp+1.5
ns
1 The exact conditions have not been finalized, but will likely match the current customer requirement for their specific display. These
conditions may be device specific.
2 Display interface clock period value for read:
Tdicpr
=
THSP_CLK ⋅ c eil
D-----I--S---P----#---_---I--F---_---C----L----K----_---P---E----R----_---R----D---
HSP_CLK_PERIOD
3 Display interface clock period value for write:
Tdicpw
=
THSP_CLK ⋅ ce il
D-----I--S---P----#---_---I--F---_---C----L----K----_---P---E----R----_---W------R--
HSP_CLK_PERIOD
4 Display interface clock down time for read:
Tdicdr
=
1--
2
THSP_CLK
⋅
ceil
2-----⋅---D----I--S----P---#---_---I--F---_---C----L----K----_----D----O----W------N----_---R----D---
HSP_CLK_PERIOD
5 Display interface clock up time for read:
Tdicur
=
1--
2
THSP_CLK
⋅
cei
l
2-----⋅---D----I--S----P---#---_---I--F---_----C---L----K----_----U----P---_---R----D---
HSP_CLK_PERIOD
6 Display interface clock down time for write:
Tdicdw
=
1--
2
THSP_CLK
⋅
ceil
2-----⋅---D----I--S----P---#---_---I--F---_---C----L----K----_----D----O----W------N----_---W------R--
HSP_CLK_PERIOD
7 Display interface clock up time for write:
Tdicuw
=
1--
2
THSP_CLK
⋅ ceil
-2----⋅---D----I--S----P---#---_---I--F----_--C-----L---K----_----U----P---_---W------R--
HSP_CLK_PERIOD
8 This parameter is a requirement to the display connected to the IPU.
9 Data read point:
Tdrp
=
THSP_CLK ⋅ cei l
---D----I--S----P---#---_---R----E----A----D----_---E----N-----
HSP_CLK_PERIOD
10 Loopback delay Tlbd is the cumulative propagation delay of read controls and read data. It includes an IPU output delay, a
device-level output delay, board delays, a device-level input delay, an IPU input delay. This value is device specific.
MCIMX31C/MCIMX31LC Technical Data, Rev. 4
Freescale Semiconductor
77