K40P144M100SF2V2 Datasheet, PDF (72/81 Pages) Freescale Semiconductor, Inc – K40 Sub-Family

Pinout
If you want the drawing for this package
144-pin LQFP
144-pin MAPBGA
Then use this document number
98ASS23177W
98ASA00222D
8 Pinout
8.1 K40 Signal Multiplexing and Pin Assignments
The following table shows the signals available on each pin and the locations of these
pins on the devices supported by this document. The Port Control Module is responsible
for selecting which ALT functionality is available on each pin.
NOTE
For FlexBus applications, use only the CLKOUT signal on the
PTA6 pin to ensure proper timing.
144 144 Pin Name Default
ALT0
ALT1
ALT2
ALT3
ALT4
ALT5
ALT6
ALT7
EzPort
LQFP MAP
BGA
— L5 RTC_
RTC_
RTC_
WAKEUP_B WAKEUP_B WAKEUP_B
— M5 NC
NC
NC
1 D3 PTE0
ADC1_SE4a ADC1_SE4a PTE0
SPI1_PCS1 UART1_TX SDHC0_D1 FB_AD27 I2C1_SDA RTC_CLKOUT
2 D2 PTE1/
LLWU_P0
ADC1_SE5a ADC1_SE5a PTE1/
LLWU_P0
SPI1_SOUT UART1_RX SDHC0_D0 FB_AD26
I2C1_SCL
SPI1_SIN
3 D1 PTE2/
ADC1_SE6a ADC1_SE6a PTE2/
SPI1_SCK UART1_CTS_ SDHC0_DCLK FB_AD25
LLWU_P1
LLWU_P1
b
4 E4 PTE3
ADC1_SE7a ADC1_SE7a PTE3
SPI1_SIN
UART1_RTS_ SDHC0_CMD FB_AD24
b
SPI1_SOUT
5 E5 VDD
VDD
VDD
6 F6 VSS
VSS
VSS
7 E3 PTE4/
DISABLED
LLWU_P2
PTE4/
LLWU_P2
SPI1_PCS0 UART3_TX SDHC0_D3 FB_CS3_b/ FB_TA_b
FB_BE7_0_b
8 E2 PTE5
DISABLED
PTE5
SPI1_PCS2 UART3_RX SDHC0_D2 FB_TBST_b/
FB_CS2_b/
FB_BE15_8_b
9 E1 PTE6
DISABLED
PTE6
SPI1_PCS3 UART3_CTS_ I2S0_MCLK FB_ALE/
b
FB_CS1_b/
FB_TS_b
USB_SOF_
OUT
10 F4 PTE7
DISABLED
PTE7
UART3_RTS_ I2S0_RXD0 FB_CS0_b
b
11 F3 PTE8
DISABLED
PTE8
I2S0_RXD1 UART5_TX I2S0_RX_FS FB_AD4
12 F2 PTE9
DISABLED
PTE9
I2S0_TXD1 UART5_RX I2S0_RX_ FB_AD3
BCLK
K40 Sub-Family Data Sheet, Rev. 1, 6/2012.
72
Preliminary
Freescale Semiconductor, Inc.
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