K50P81M100SF2 Datasheet, PDF (67/72 Pages) Freescale Semiconductor, Inc – Up to 100 MHz ARM Cortex-M4 core with DSP instructions delivering 1.25 Dhrystone MIPS per MHz

81 80
MAP LQF
BGA P
Pin Name
• 37 PTA4
• 38 VDD
• 39 VSS
• 40 PTA18
Default
NMI_b/
EZP_CS_b
VDD
VSS
EXTAL
ALT0
TSI0_CH5
VDD
VSS
EXTAL
ALT1
PTA4
PTA18
• 41 PTA19
XTAL
XTAL
PTA19
• 42 RESET_b RESET_b RESET_b
• 43 PTB0
/
/
PTB0
ADC0_SE8/ ADC0_SE8/
ADC1_SE8/ ADC1_SE8/
TSI0_CH0 TSI0_CH0
• 44 PTB1
/
/
PTB1
ADC0_SE9/ ADC0_SE9/
ADC1_SE9/ ADC1_SE9/
TSI0_CH6 TSI0_CH6
• 45 PTB2
/
/
PTB2
ADC0_SE1 ADC0_SE1
2/TSI0_CH7 2/TSI0_CH7
• 46 PTB3
/
/
PTB3
ADC0_SE1 ADC0_SE1
3/TSI0_CH8 3/TSI0_CH8
• 47 PTB10
/
/
PTB10
ADC1_SE1 ADC1_SE1
4
4
• 48 PTB11
/
/
PTB11
ADC1_SE1 ADC1_SE1
5
5
• 49 VSS
VSS
VSS
• 50 VDD
VDD
VDD
• 51 PTB16
/TSI0_CH9 /TSI0_CH9 PTB16
• 52 PTB17
/TSI0_CH10 /TSI0_CH10 PTB17
• 53 PTB18
/TSI0_CH11 /TSI0_CH11 PTB18
• 54 PTB19
/TSI0_CH12 /TSI0_CH12 PTB19
• 55 PTC0
• 56 PTC1
• 57 PTC2
/
/
PTC0
ADC0_SE1 ADC0_SE1
4/
4/
TSI0_CH13 TSI0_CH13
/
/
PTC1
ADC0_SE1 ADC0_SE1
5/
5/
TSI0_CH14 TSI0_CH14
/
/
PTC2
ADC0_SE4 ADC0_SE4
b/
b/
ALT2
ALT3
ALT4
ALT5
FTM0_CH1
FTM0_FLT2 FTM_CLKIN
0
FTM1_FLT0 FTM_CLKIN
1
I2C0_SCL FTM1_CH0
I2C0_SDA FTM1_CH1
I2C0_SCL UART0_RT
S_b
I2C0_SDA UART0_CT
S_b
SPI1_PCS0 UART3_RX
SPI1_SCK UART3_TX
FB_AD19
FB_AD18
SPI1_SOUT UART0_RX
SPI1_SIN UART0_TX
FB_AD17
FB_AD16
SPI0_PCS4
FTM2_CH0
FTM2_CH1
PDB0_EXT
RG
I2S0_TX_B
CLK
I2S0_TX_F
S
I2S0_TXD
FB_AD15
FB_OE_b
FB_AD14
SPI0_PCS3 UART1_RT FTM0_CH0 FB_AD13
S_b
SPI0_PCS2 UART1_CT FTM0_CH1 FB_AD12
S_b
ALT6
ALT7
NMI_b
LPT0_ALT1
FTM1_QD_
PHA
FTM1_QD_
PHB
FTM0_FLT3
FTM0_FLT0
FTM0_FLT1
FTM0_FLT2
EWM_IN
EWM_OUT
_b
FTM2_QD_
PHA
FTM2_QD_
PHB
K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
Freescale Semiconductor, Inc.
Preliminary
Pinout
EzPort
EZP_CS_b
67