K10P64M72SF1 Datasheet, PDF (67/70 Pages) Freescale Semiconductor, Inc – K10 Sub-Family

64 Pin Name
Default
ALT0
ALT1
ALT2
ALT3
ALT4
ALT5
ALT6
ALT7
LQFP
_QFN
49 PTC4/
LLWU_P8
DISABLED
PTC4/
LLWU_P8
SPI0_PCS0 UART1_TX FTM0_CH3 FB_AD11
CMP1_OUT
50 PTC5/
LLWU_P9
DISABLED
PTC5/
LLWU_P9
SPI0_SCK LPTMR0_ALT2 I2S0_RXD0 FB_AD10
CMP0_OUT
51 PTC6/
LLWU_P10
CMP0_IN0
CMP0_IN0
PTC6/
LLWU_P10
SPI0_SOUT PDB0_EXTRG I2S0_RX_BCLK FB_AD9
I2S0_MCLK
52 PTC7
CMP0_IN1 CMP0_IN1 PTC7
SPI0_SIN
I2S0_RX_FS FB_AD8
53 PTC8
ADC1_SE4b/ ADC1_SE4b/ PTC8
CMP0_IN2 CMP0_IN2
I2S0_MCLK FB_AD7
54 PTC9
ADC1_SE5b/ ADC1_SE5b/ PTC9
CMP0_IN3 CMP0_IN3
I2S0_RX_BCLK FB_AD6
FTM2_FLT0
55 PTC10
ADC1_SE6b ADC1_SE6b PTC10
I2C1_SCL
I2S0_RX_FS FB_AD5
56 PTC11/
LLWU_P11
ADC1_SE7b ADC1_SE7b PTC11/
LLWU_P11
I2C1_SDA
I2S0_RXD1 FB_RW_b
57 PTD0/
LLWU_P12
DISABLED
PTD0/
LLWU_P12
SPI0_PCS0 UART2_RTS_b
FB_ALE/
FB_CS1_b/
FB_TS_b
58 PTD1
ADC0_SE5b ADC0_SE5b PTD1
SPI0_SCK UART2_CTS_b
FB_CS0_b
59 PTD2/
LLWU_P13
DISABLED
PTD2/
LLWU_P13
SPI0_SOUT UART2_RX
FB_AD4
60 PTD3
DISABLED
PTD3
SPI0_SIN UART2_TX
FB_AD3
61 PTD4/
LLWU_P14
DISABLED
PTD4/
LLWU_P14
SPI0_PCS1 UART0_RTS_b FTM0_CH4
FB_AD2
EWM_IN
62 PTD5
ADC0_SE6b ADC0_SE6b PTD5
SPI0_PCS2
UART0_CTS_ FTM0_CH5
b/
UART0_COL_b
FB_AD1
EWM_OUT_b
63 PTD6/
LLWU_P15
ADC0_SE7b ADC0_SE7b PTD6/
LLWU_P15
SPI0_PCS3 UART0_RX
FTM0_CH6
FB_AD0
FTM0_FLT0
64 PTD7
DISABLED
PTD7
CMT_IRO UART0_TX FTM0_CH7
FTM0_FLT1
Pinout
EzPort
8.2 K10 Pinouts
The below figure shows the pinout diagram for the devices supported by this document.
Many signals may be multiplexed onto a single pin. To determine what signals can be
used on which pin, see the previous section.
K10 Sub-Family Data Sheet, Rev. 2, 4/2012.
Freescale Semiconductor, Inc.
67