K40P121M100SF2V2 Datasheet, PDF (66/70 Pages) Freescale Semiconductor, Inc – K40 Sub-Family

Pinout
121 Pin Name
MAP
BGA
J8 PTA4/
LLWU_P3
K7 PTA5
E5 VDD
G3 VSS
J9 PTA10
Default
NMI_b/
EZP_CS_b
DISABLED
VDD
VSS
DISABLED
ALT0
TSI0_CH5
VDD
VSS
ALT1
PTA4/
LLWU_P3
PTA5
PTA10
J4 PTA11
DISABLED
PTA11
K8 PTA12
CMP2_IN0 CMP2_IN0 PTA12
L8 PTA13/
LLWU_P4
CMP2_IN1
CMP2_IN1
PTA13/
LLWU_P4
K9 PTA14
DISABLED
PTA14
L9 PTA15
DISABLED
PTA15
J10 PTA16
DISABLED
PTA16
H10 PTA17
L10 VDD
K10 VSS
L11 PTA18
K11 PTA19
J11 RESET_b
H11 PTA29
G11 PTB0/
LLWU_P5
G10 PTB1
G9 PTB2
G8 PTB3
F11 PTB6
E11 PTB7
D11 PTB8
ADC1_SE17
VDD
VSS
EXTAL0
XTAL0
RESET_b
DISABLED
LCD_P0/
ADC0_SE8/
ADC1_SE8/
TSI0_CH0
LCD_P1/
ADC0_SE9/
ADC1_SE9/
TSI0_CH6
LCD_P2/
ADC0_SE12/
TSI0_CH7
LCD_P3/
ADC0_SE13/
TSI0_CH8
LCD_P6/
ADC1_SE12
LCD_P7/
ADC1_SE13
LCD_P8
ADC1_SE17
VDD
VSS
EXTAL0
XTAL0
RESET_b
LCD_P0/
ADC0_SE8/
ADC1_SE8/
TSI0_CH0
LCD_P1/
ADC0_SE9/
ADC1_SE9/
TSI0_CH6
LCD_P2/
ADC0_SE12/
TSI0_CH7
LCD_P3/
ADC0_SE13/
TSI0_CH8
LCD_P6/
ADC1_SE12
LCD_P7/
ADC1_SE13
LCD_P8
PTA17
PTA18
PTA19
PTA29
PTB0/
LLWU_P5
PTB1
PTB2
PTB3
PTB6
PTB7
PTB8
ALT2
ALT3
ALT4
ALT5
ALT6
ALT7
EzPort
FTM0_CH1
USB_CLKIN FTM0_CH2
NMI_b
EZP_CS_b
CMP2_OUT I2S0_TX_BCLK JTAG_TRST_b
CAN0_TX
FTM2_CH0
FTM2_CH1
FTM1_CH0
CAN0_RX FTM1_CH1
SPI0_PCS0
SPI0_SCK
SPI0_SOUT
SPI0_SIN
UART0_TX
UART0_RX
UART0_CTS_
b/
UART0_COL_b
UART0_RTS_b
FB_AD15
FTM2_QD_ TRACE_D0
PHA
FB_OE_b
FTM2_QD_
PHB
FB_CS5_b/ I2S0_TXD0
FB_TSIZ1/
FB_BE23_16_b
FTM1_QD_
PHA
FB_CS4_b/ I2S0_TX_FS
FB_TSIZ0/
FB_BE31_24_b
FTM1_QD_
PHB
FB_AD31 I2S0_RX_BCLK I2S0_TXD1
FB_AD30 I2S0_RXD0
FB_AD29 I2S0_RX_FS I2S0_RXD1
FB_AD28 I2S0_MCLK
FTM0_FLT2
FTM1_FLT0
FTM_CLKIN0
FTM_CLKIN1
LPTMR0_ALT1
I2C0_SCL FTM1_CH0
FB_AD19
FTM1_QD_ LCD_P0
PHA
I2C0_SDA FTM1_CH1
FTM1_QD_ LCD_P1
PHB
I2C0_SCL UART0_RTS_b
FTM0_FLT3 LCD_P2
I2C0_SDA
UART0_CTS_
b/
UART0_COL_b
UART3_RTS_b
FTM0_FLT0 LCD_P3
LCD_P6
LCD_P7
LCD_P8
K40 Sub-Family Data Sheet, Rev. 1, 6/2012.
66
Preliminary
Freescale Semiconductor, Inc.
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