K40P100M72SF1 Datasheet, PDF (65/73 Pages) Freescale Semiconductor, Inc – K40 Sub-Family

104 100
MAP LQFP
BGA
Pin Name
K1 18 PGA0_DP/
ADC0_DP0/
ADC1_DP3
K2 19 PGA0_DM/
ADC0_DM0/
ADC1_DM3
L1 20 PGA1_DP/
ADC1_DP0/
ADC0_DP3
L2 21 PGA1_DM/
ADC1_DM0/
ADC0_DM3
F5 22 VDDA
G5 23 VREFH
G6 24 VREFL
F6 25 VSSA
L3 26 VREF_OUT/
CMP1_IN5/
CMP0_IN5/
ADC1_SE18
K5 27 DAC0_OUT/
CMP1_IN3/
ADC0_SE23
L7 — RTC_
WAKEUP_B
L4 28 XTAL32
L5 29 EXTAL32
K6 30 VBAT
H5 31 PTE24
J5 32 PTE25
H6 33 PTE26
Default
PGA0_DP/
ADC0_DP0/
ADC1_DP3
PGA0_DM/
ADC0_DM0/
ADC1_DM3
PGA1_DP/
ADC1_DP0/
ADC0_DP3
PGA1_DM/
ADC1_DM0/
ADC0_DM3
VDDA
VREFH
VREFL
VSSA
VREF_OUT/
CMP1_IN5/
CMP0_IN5/
ADC1_SE18
DAC0_OUT/
CMP1_IN3/
ADC0_SE23
RTC_
WAKEUP_B
XTAL32
EXTAL32
VBAT
ADC0_SE17
ADC0_SE18
DISABLED
ALT0
PGA0_DP/
ADC0_DP0/
ADC1_DP3
PGA0_DM/
ADC0_DM0/
ADC1_DM3
PGA1_DP/
ADC1_DP0/
ADC0_DP3
PGA1_DM/
ADC1_DM0/
ADC0_DM3
VDDA
VREFH
VREFL
VSSA
VREF_OUT/
CMP1_IN5/
CMP0_IN5/
ADC1_SE18
DAC0_OUT/
CMP1_IN3/
ADC0_SE23
RTC_
WAKEUP_B
XTAL32
EXTAL32
VBAT
ADC0_SE17
ADC0_SE18
ALT1
PTE24
PTE25
PTE26
J6 34 PTA0
JTAG_TCLK/ TSI0_CH1 PTA0
SWD_CLK/
EZP_CLK
H8 35 PTA1
J7 36 PTA2
H9 37 PTA3
J8 38 PTA4/
LLWU_P3
K7 39 PTA5
JTAG_TDI/ TSI0_CH2
EZP_DI
JTAG_TDO/ TSI0_CH3
TRACE_SWO/
EZP_DO
JTAG_TMS/ TSI0_CH4
SWD_DIO
NMI_b/
TSI0_CH5
EZP_CS_b
DISABLED
PTA1
PTA2
PTA3
PTA4/
LLWU_P3
PTA5
ALT2
ALT3
UART4_TX
UART4_RX
UART4_CTS_
b
UART0_CTS_
b/
UART0_COL_
b
FTM0_CH5
UART0_RX FTM0_CH6
UART0_TX FTM0_CH7
UART0_RTS_ FTM0_CH0
b
FTM0_CH1
USB_CLKIN FTM0_CH2
Pinout
ALT4
ALT5
ALT6
ALT7
EzPort
EWM_OUT_b
EWM_IN
RTC_CLKOUT USB_CLKIN
JTAG_TCLK/ EZP_CLK
SWD_CLK
JTAG_TDI EZP_DI
JTAG_TDO/ EZP_DO
TRACE_SWO
JTAG_TMS/
SWD_DIO
NMI_b
EZP_CS_b
CMP2_OUT I2S0_TX_
BCLK
JTAG_TRST_
b
K40 Sub-Family Data Sheet, Rev. 2, 4/2012.
Freescale Semiconductor, Inc.
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