MSC8156E Datasheet, PDF (62/68 Pages) Freescale Semiconductor, Inc – Six-Core Digital Signal Processor with Security

Hardware Design Considerations
Table 48. Connectivity of TDM Related Pins When TDM Interface Is Not Used
Signal Name
Pin Connection
TDMnTCLK
GND
TDMnTxDAT
GND
TDMnTSYN
GND
V_DDIO
2.5 V
Notes: 1. x = {0, 1, 2,3}
2. In case of subset of TDM interface usage please make sure to disable unused TDM modules. See TDM chapter in the
MSC8156E Reference Manual for details.
3.5.5 Miscellaneous Pins
Table 49 lists the board connections for the pins not required by the system design. Table 49 assumes that the alternate function
of the specified pin is not used. If the alternate function is used, connect that pin as required to support the selected function.
Table 49. Connectivity of Individual Pins When They Are Not Required
CLKOUT
EE0
EE1
GPIO[31–0]
SCL
SDA
INT_OUT
IRQ[15–0]
NMI
NMI_OUT
RC[21–0]
STOP_BS
TCK
TDI
TDO
TMR[4–0]
TMS
TRST
URXD
UTXD
DDN[1–0]
DRQ[1–0]
RCW_LSEL_0
RCW_LSEL_1
RCW_LSEL_2
RCW_LSEL_3
V_DDIO
Signal Name
Pin Connection
NC
GND
NC
NC
See the GPIO connectivity guidelines in this table.
See the GPIO connectivity guidelines in this table.
NC
See the GPIO connectivity guidelines in this table.
V_DDIO
NC
GND
GND
GND
GND
NC
See the GPIO connectivity guidelines in this table.
GND
See Section 3.1 for guidelines.
See the GPIO connectivity guidelines in this table.
See the GPIO connectivity guidelines in this table.
See the GPIO connectivity guidelines in this table.
See the GPIO connectivity guidelines in this table.
GND
GND
GND
GND
2.5 V
Note: For details on configuration, see the MSC8156E Reference Manual. For additional information, refer to the MSC815x
and MSC825x DSP Family Design Checklist.
MSC8156E Six-Core Digital Signal Processor with Security Data Sheet, Rev. 0
62
Freescale Semiconductor