DSP56309 Datasheet, PDF (62/108 Pages) Freescale Semiconductor, Inc – 24-Bit Digital Signal Processor

Specifications
2.5.9 Timer Timing
Table 2-19. Timer Timing¹
No.
Characteristics
Expression²
100 MHz
Min
Max
480 _{TIO Low}
481 TIO High
482 Timer set-up time from TIO (Input) assertion to
CLKOUT rising edge
2 × T_C + 2.0
2 × T_C + 2.0
22.0
—
22.0
—
9.0
10.0
483 Synchronous timer delay time from CLKOUT rising
edge to the external memory access address out valid
caused by first interrupt instruction execution
10.25 × T_C + 1.0
103.5
—
484
485
Notes:
CLKOUT rising edge to TIO (Output) assertion
• Minimum
• Maximum
0.5 × T_C + 0.5
0.5 × T_C + 19.8
5.5
—
—
24.8
CLKOUT rising edge to TIO (Output) deassertion
• Minimum
• Maximum
0.5 × T_C + 0.5
0.5 × T_C + 19.8
5.5
—
—
24.8
1. V_CC = 3.3 V ± 0.3 V; T_J = −40°C to +100 °C, C_L = 50 pF.
2. An expression is used to compute the number listed as the minimum or maximum value as appropriate.
TIO
480
481
Figure 2-40. TIO Timer Event Input Restrictions
Unit
ns
ns
ns
ns
ns
ns
ns
ns
CLKOUT
TIO (Input)
Address
482
483
First Interrupt Instruction Execution
Figure 2-41. Timer Interrupt Generation
CLKOUT
TIO (Output)
484
485
Figure 2-42. External Pulse Generation
2-42
DSP56309 Technical Data, Rev. 7
Freescale Semiconductor