MC1321X_09 Datasheet, PDF (61/70 Pages) Freescale Semiconductor, Inc – ZigBee™- Compliant Platform - 2.4 GHz Low Power Transceiver for the IEEE® 802.15.4 Standard plus Microcontroller

6.4.3 System SPI Timing
Table 20 describes the timing requirements for the SPI system.
Table 20. SPI Timing
No.
Function
Operating frequency
Master
1 SCK period
Master
2 Enable lead time
Master
3 Enable lag time
Master
4 Clock (SCK) high or low time
Master
5 Data setup time (inputs)
Master
6 Data hold time (inputs)
Master
7 Data valid (after SCK edge)
Master
8 Data hold time (outputs)
Master
9 Rise time
Input
Output
10 Fall time
Input
Output
Symbol
f_op
t_SCK
t_Lead
t_Lag
t_WSCK
t_SU
t_HI
t_v
t_HO
t_RI
t_RO
t_FI
t_FO
Min
f_Bus/2048
2
1/2
1/2
62.5
15
0
—
0
—
—
—
—
Max
f_Bus/2 = 8 MHz
2048
—
—
1024 t_cyc
—
—
25
—
t_cyc – 25
25
t_cyc – 25
25
SS¹
(OUTPUT)
SCK
(CPOL = 0)
(OUTPUT)
SCK
(CPOL = 1)
(OUTPUT)
MISO
(INPUT)
MOSI
(OUTPUT)
1
9
4
4
10
5
6
MSB IN²
BIT 6 . . . 1
LSB IN
2
7
MSB OUT²
BIT 6 . . . 1
LSB OUT
Figure 33. SPI Master Timing (CPHA = 0)
3
8
Freescale Semiconductor
MC13211/212/213 Technical Data, Rev. 1.8
Unit
Hz
t_cyc
t_SCK
t_SCK
ns
ns
ns
ns
ns
ns
ns
ns
ns
61