DSP56300 Datasheet, PDF (60/108 Pages) Freescale Semiconductor, Inc – Implementing Viterbi Decoders Using the VSL Instruction on DSP Families

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Algorithmic Extensions
Main: Putting the Pieces Back Together
We have placed a comment at the beginning, moving the branch metric table address to
r2. Since this is done in the FindMetrics routine, we donÕt actually need to execute this,
but it is included as a reminder that r2 needs to be set properly. The remainder of this
routine is like the ACS butterfly, except that parts are removed, and the number of
iterations varies.
We store the beginning values of r4 and r5 so that we can restore them at the end,
swapped with each other. Because the number of loop iterations varies, we donÕt get the
automatic swapping that the ACS macro has. The first branch metrics are fetched, and
the updated count value is stored in memory. We then load the first path metric/path
pair.
The loop is quite similar to the ACS except we have eliminated unneeded operations. We
add a branch metric and load the next path metric/path pair (for the lower path). We
then add a branch metric and read the branch metrics for the next loop iteration. Taking
the MAX of the accumulators chooses the survivor path metric/path pair, and the path
metric read pointer is incremented for the next loop in parallel. The move loads the path
metric/path pair for the next loop. The VSL completes the current state update for the
upper state.
Note that the state storage pointer is incremented only once, even though we only
update the upper state. This means that state 2 will be written at the address normally
used for state 1, state 4 at the address used for state 2, etc. The next invocation of the
ACSFlush will read the data correctly, because the read pointer increment, r5 is halved
for each invocation of this macro. During the next invocation, we will only have states 0,
4, 8, etc. These are exactly the states that are possible when the encoder is being 0 filled.
To end this macro, we restore r4 and r5 to the desired values, swapping old and update
memories as needed. The loop count is read from n5, halved, and restored, so that we
process half as many states on the next loop invocation.
4.5 MAIN: PUTTING THE PIECES BACK TOGETHER
There are a number of changes to the main program that are required for these new
macros to operate properly. The code for MAIN appears in the following example.
4-12
Viterbi Decoder Implementation
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