DSP56300 Datasheet, PDF (19/108 Pages) Freescale Semiconductor, Inc – Implementing Viterbi Decoders Using the VSL Instruction on DSP Families

Freescale Semiconductor, Inc.
The Viterbi Algorithm
Viterbi Decoder
Figure 2-2 shows a prototype for one state of the state tree for this decoder. Figure 2-3
shows the entire tree used by the decoder to track the first five input pairs. The state of
the recreated encoder appears in the box. Along each arrow (a state transition) appears a
number pair showing the corresponding encoder output bit pair for that state transition
(the output produced immediately before the state changes). This figure is ordered so
that transitions corresponding to an input 0 are always the upper path and transitions
corresponding to an input 1 are always the lower path. To determine the encoder output
for a given transition, load the encoder with the state and use a 0 or 1 for the input bit,
according to the transition chosen. The encoder polynomials then determine the encoder
output, as shown in Figure 2-1.
Encoder Output/
Branch Metric
State ^Transition
Path Metric State
Figure 2-2 Single State of Prototype Encoder Tree Diagram
Viterbi Decoder Implementation
2-5
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