K30P121M100SF2 Datasheet, PDF (57/61 Pages) Freescale Semiconductor, Inc – Up to 100 MHz ARM Cortex-M4 core with DSP instructions delivering 1.25 Dhrystone MIPS per MHz

Pinout
144 121 Pin Name Default
ALT0
ALT1
ALT2
ALT3
ALT4
ALT5
ALT6
ALT7
EzPort
LQF MAP
P BGA
— • PTA17
ADC1_SE1 ADC1_SE1 PTA17
7
7
SPI0_SIN UART0_RT
S_b
I2S0_MCLK I2S0_CLKIN
— • VDD
VDD
VDD
— • VSS
VSS
VSS
— • PTA18
EXTAL
EXTAL
PTA18
FTM0_FLT2 FTM_CLKIN
0
— • PTA19
XTAL
XTAL
PTA19
FTM1_FLT0 FTM_CLKIN
1
LPT0_ALT1
— • RESET_b RESET_b RESET_b
— • PTA24
DISABLED
PTA24
— • PTA25
DISABLED
PTA25
— • PTA26
DISABLED
PTA26
— • PTA27
DISABLED
PTA27
— • PTA28
DISABLED
PTA28
— • PTA29
DISABLED
PTA29
— • PTB0
LCD_P0/ LCD_P0/ PTB0
ADC0_SE8/ ADC0_SE8/
ADC1_SE8/ ADC1_SE8/
TSI0_CH0 TSI0_CH0
I2C0_SCL FTM1_CH0
FTM1_QD_ LCD_P0
PHA
— • PTB1
LCD_P1/ LCD_P1/ PTB1
ADC0_SE9/ ADC0_SE9/
ADC1_SE9/ ADC1_SE9/
TSI0_CH6 TSI0_CH6
I2C0_SDA FTM1_CH1
FTM1_QD_ LCD_P1
PHB
— • PTB2
LCD_P2/ LCD_P2/ PTB2
ADC0_SE1 ADC0_SE1
2/TSI0_CH7 2/TSI0_CH7
I2C0_SCL UART0_RT
S_b
FTM0_FLT3 LCD_P2
— • PTB3
LCD_P3/ LCD_P3/ PTB3
ADC0_SE1 ADC0_SE1
3/TSI0_CH8 3/TSI0_CH8
I2C0_SDA UART0_CT
S_b
FTM0_FLT0 LCD_P3
— • PTB6
LCD_P6/ LCD_P6/ PTB6
ADC1_SE1 ADC1_SE1
2
2
LCD_P6
— • PTB7
LCD_P7/ LCD_P7/ PTB7
ADC1_SE1 ADC1_SE1
3
3
LCD_P7
— • PTB8
LCD_P8 LCD_P8 PTB8
UART3_RT
S_b
LCD_P8
— • PTB9
LCD_P9 LCD_P9 PTB9
SPI1_PCS1 UART3_CT
S_b
LCD_P9
— • PTB10
LCD_P10/ LCD_P10/ PTB10
ADC1_SE1 ADC1_SE1
4
4
SPI1_PCS0 UART3_RX
FTM0_FLT1 LCD_P10
— • PTB11
LCD_P11/ LCD_P11/ PTB11
ADC1_SE1 ADC1_SE1
5
5
SPI1_SCK UART3_TX
FTM0_FLT2 LCD_P11
— • PTB16
LCD_P12/ LCD_P12/ PTB16
TSI0_CH9 TSI0_CH9
SPI1_SOUT UART0_RX
EWM_IN LCD_P12
K30 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
Freescale Semiconductor, Inc.
Preliminary
57