MCIMX31_09 Datasheet, PDF (54/118 Pages) Freescale Semiconductor, Inc – Multimedia Applications Processors

Electrical Characteristics
4.3.13 I²C Electrical Specifications
This section describes the electrical information of the I²C Module.
4.3.13.1 I²C Module Timing
Figure 41 depicts the timing of I²C module. Table 42 lists the I²C module timing parameters where the I/O
supply is 2.7 V. 1
IC10
IC11
IC9
I2DAT
IC2
I2CLK
IC8
IC4
IC7
IC3
START
IC10
IC11
START
IC6
IC5
IC1
Figure 41. I²C Bus Timing Diagram
STOP
START
Table 42. I²C Module Timing Parameters—I²C Pin I/O Supply=2.7 V
Standard Mode
Fast Mode
ID
Parameter
Unit
Min
Max
Min
Max
IC1 I2CLK cycle time
IC2 Hold time (repeated) START condition
IC3 Set-up time for STOP condition
IC4 Data hold time
IC5 HIGH Period of I2CLK Clock
IC6 LOW Period of the I2CLK Clock
IC7 Set-up time for a repeated START condition
IC8 Data set-up time
IC9 Bus free time between a STOP and START condition
IC10 Rise time of both I2DAT and I2CLK signals
IC11 Fall time of both I2DAT and I2CLK signals
IC12 Capacitive load for each bus line (C_b)
10
—
2.5
—
μs
4.0
—
0.6
—
μs
4.0
—
0.6
0¹
3.45²
0¹
—
μs
0.9²
μs
4.0
—
0.6
—
μs
4.7
—
1.3
—
μs
4.7
—
250
—
0.6
100³
—
μs
—
ns
4.7
—
1.3
—
μs
—
1000 20+0.1C_b4
300
ns
—
300
20+0.1C_b4
300
ns
—
400
—
400
pF
1 _{A device must internally provide a hold time of at least 300 ns for I2DAT signal in order to bridge the undefined region of the}
falling edge of I2CLK.
2 _{The maximum hold time has to be met only if the device does not stretch the LOW period (ID IC6) of the I2CLK signal.}
3 _{A Fast-mode I}2_{C-bus device can be used in a standard-mode I}2_{C-bus system, but the requirement of set-up time (ID IC7) of}
250 ns must then be met. This will automatically be the case if the device does not stretch the LOW period of the I2CLK signal.
If such a device does stretch the LOW period of the I2CLK signal, it must output the next data bit to the I2DAT line max_rise_time
(ID No IC10) + data_setup_time (ID No IC8) = 1000 + 250 = 1250 ns (according to the Standard-mode I²C-bus specification)
before the I2CLK line is released.
4 _{Cb = total capacitance of one bus line in pF.}
MCIMX31/MCIMX31L Technical Data, Rev. 4.3
54
Freescale Semiconductor