K10P48M50SF0 Datasheet, PDF (54/59 Pages) Freescale Semiconductor, Inc – K10 Sub-Family

Dimensions
7 Dimensions
7.1 Obtaining package dimensions
Package dimensions are provided in package drawings.
To find a package drawing, go to http://www.freescale.com and perform a keyword
search for the drawing’s document number:
If you want the drawing for this package
48-pin LQFP
48-pin QFN
Then use this document number
98ASH00962A
98ARH99048A
8 Pinout
8.1 K10 Signal Multiplexing and Pin Assignments
The following table shows the signals available on each pin and the locations of these
pins on the devices supported by this document. The Port Control Module is responsible
for selecting which ALT functionality is available on each pin.
48 Pin Name
Default
ALT0
ALT1
ALT2
ALT3
ALT4
ALT5
ALT6
ALT7
EzPort
LQFP
-QFN
1 VDD
VDD
VDD
2 VSS
VSS
VSS
3 PTE16
ADC0_SE4a ADC0_SE4a PTE16
SPI0_PCS0 UART2_TX FTM_CLKIN0
FTM0_FLT3
4 PTE17
ADC0_SE5a ADC0_SE5a PTE17
SPI0_SCK UART2_RX FTM_CLKIN1
LPTMR0_ALT3
5 PTE18
ADC0_SE6a ADC0_SE6a PTE18
SPI0_SOUT UART2_CTS_b I2C0_SDA
6 PTE19
ADC0_SE7a ADC0_SE7a PTE19
SPI0_SIN UART2_RTS_b I2C0_SCL
7 ADC0_DP0 ADC0_DP0 ADC0_DP0
8 ADC0_DM0 ADC0_DM0 ADC0_DM0
9 VDDA
VDDA
VDDA
10 VREFH
VREFH
VREFH
11 VREFL
VREFL
VREFL
12 VSSA
VSSA
VSSA
13 VREF_OUT/
CMP1_IN5/
CMP0_IN5
VREF_OUT/
CMP1_IN5/
CMP0_IN5
VREF_OUT/
CMP1_IN5/
CMP0_IN5
K10 Sub-Family Data Sheet, Rev. 4 5/2012.
54
Freescale Semiconductor, Inc.