MCF523X_06 Datasheet, PDF (45/46 Pages) Freescale Semiconductor, Inc – Integrated Microprocessor Hardware Specification

Rev. No.
1.5
1.6
1.7
1.8
2
Document Revision History
Table 26. Document Revision History (continued)
Substantive Change(s)
• Removed Overview, Features, Modes of Operation, and Address Multiplexing sections. This
information can be found in the MCF5235 Reference Manual.
• Removed list of documentation table in Section 8, “Documentation.”. An up-to-date list is
always available on our web site.
• Table 9: Changed core supply voltage (V_DD) from 1.35-1.65 to 1.4-1.6.
• Table 10: Changed max f_ICO frequency from “75 MHz” to “150 MHz”.
• Added Section 5.2.1, “Supply Voltage Sequencing and Separation Cautions.”
• Updated 196MAPBGA package dimensions, Figure 3.
• Table 2: Changed SD_CKE pin location from 139 to “—” for the 160QFP device. Changed
QSPI_CS1 pin location from “—” to 139 for the 160QFP device.
• Figure 8: Changed pin 139 label from “SD_CKE/QSPI_CS1” to “QSPI_CS1/SD_CKE”.
• Removed second sentence from Section 7.10.1, “MII Receive Signal Timing (ERXD[3:0],
ERXDV, ERXER, and ERXCLK),” and Section 7.10.2, “MII Transmit Signal Timing (ETXD[3:0],
ETXEN, ETXER, ETXCLK),” regarding no minimum frequency requirement for TXCLK.
• Removed third and fourth paragraphs from Section 7.10.2, “MII Transmit Signal Timing
(ETXD[3:0], ETXEN, ETXER, ETXCLK),” as this feature is not supported on this device.
MCF523x Integrated Microprocessor Hardware Specification, Rev. 2
Freescale Semiconductor
45