DSP56F803BU80 Datasheet, PDF (45/52 Pages) Freescale Semiconductor, Inc – Up to 40 MIPS at 80MHz core frequency

Controller Area Network (CAN) Timing
1. If Wakeup glitch filter is enabled during the design initialization and also CAN is put into SLEEP mode then, any bus event
(on MSCAN_RX pin) whose duration is less than 5 micro seconds is filtered away. However, a valid CAN bus wakeup detec-
tion takes place for a wakeup pulse equal to or greater than 5 microseconds. The value of 5 microseconds originates from the
fact that the CAN wakeup message consists of 5 dominant bits at the highest possible baud rate of 1Mbps.
2. Parameters listed are guaranteed by design.
MSCAN_RX
CAN receive
data pin
(Input)
T _WAKEUP
Figure 3-27 Bus Wakeup Detection
56F803 Technical Data, Rev. 16
Freescale Semiconductor
45