MC34708 Datasheet, PDF (41/159 Pages) Freescale Semiconductor, Inc – Power Management Integrated Circuit (PMIC) for i.MX50/53 Families

Functional Block Description
7.5.3.6 Timers
The different timers as used by the state machine are listed by the following. This listing does not include RTC timers for
timekeeping. A synchronization error of up to one clock period may occur with respect to the occurrence of an asynchronous
event, the duration listed below is therefore the effective minimum time period.
Table 26. Timer Main Characteristics
Timer
Duration
Clock
Under-voltage Timer
4.0 ms
32 k/32
Reset Timer
40 ms
32 k/32
Watchdog Timer
128 ms
32 k/32
Power Cut Timer Programmable 0 to 8 seconds 32 k/1024
in 31.25 ms steps
7.5.3.6.1 Timing Diagrams
A Turn On event timing diagrams shown in Figure 7.
Turn On Event
Sequencer time slots
ow
WDI Pulled Low
System Core Active
Turn On Verification
Power Up Sequencer
UV Masking
RESETB
INT
WDI
1 - Off
8 ms 8 ms
20 ms
2 - Cold Start
12 ms
128 ms
3 - Watchdog
4 - On
3- Watchdog 1 - Off
Power up of the system upon a Turn On Event followed by a transition to the On state if WDI is pulled high
Turn on Event is based on PWRON being pulled low
... or transition to Off state if WDI remains low
= Indeterminate State
Figure 7. Power Up Timing Diagram
MC34708
41
Analog Integrated Circuit Device Data
Freescale Semiconductor