908E625_10 Datasheet, PDF (40/49 Pages) Freescale Semiconductor, Inc – Integrated Quad Half H-Bridge with Power Supply, Embedded MCU, and LIN Serial Communication

FUNCTIONAL DEVICE OPERATION
FACTORY TRIMMING AND CALIBRATION
Autonomous Watchdog Rate Bit (AWDR)
This read/write bit selects the clock rate of the
Autonomous Watchdog. Reset clears the AWDR bit.
• 1 = Fast rate selected (10 ms)
• 0 = Slow rate selected (20 ms)
VOLTAGE REGULATOR
The 908E625 chip contains a low-power, low-drop voltage
regulator to provide internal power and external power for the
MCU. The on-chip regulator consist of two elements, the
main voltage regulator and the low-voltage reset circuit.
The V_DD regulator accepts a unregulated input supply and
provides a regulated V_DD supply to all digital sections of the
device. The output of the regulator is also connected to the
VDD pin to provide the 5.0 V to the microcontroller.
RUN Mode
During RUN mode the main voltage regulator is on. It
provides a regulated supply to all digital sections.
STOP Mode
During STOP mode the STOP mode regulator supplies a
regulated output voltage. The STOP mode regulator has a
very limited output current capability. The output voltage will
be lower than the output voltage of the main voltage
regulator.
FACTORY TRIMMING AND CALIBRATION
To enhance the ease-of-use of the 908E625, various
parameters (e.g. ICG trim value) are stored in the flash
memory of the device. The following flash memory locations
are reserved for this purpose and might have a value different
from the empty (0xFF) state:
•0xFD80:0xFDDF Trim and Calibration Values
•0xFFFE:0xFFFF Reset Vector
In the event the application uses these parameters, one
has to take care not to erase or override these values. If these
parameters are not used, these flash locations can be erased
and otherwise used.
Trim Values
Below the usage of the trim values located in the flash
memory is explained
Internal Clock Generator (ICG) Trim Value
The internal clock generator (ICG) module is used to
create a stable clock source for the microcontroller without
using any external components. The untrimmed frequency of
the low-frequency base clock (IBASE), will vary as much as
±25 percent due to process, temperature, and voltage
dependencies. To compensate this dependencies a ICG trim
values is located at address $FDC2. After trimming the ICG
is a range of typ. ±2% (±3% max.) at nominal conditions
(filtered (100nF) and stabilized (4,7uF) V_DD = 5V,
T_Ambient~25°C) and will vary over temperature and voltage
(VDD) as indicated in the 68HC908EY16 datasheet.
To trim the ICG this values has to be copied to the ICG
Trim Register ICGTR at address $38 of the MCU.
Important The value has to copied after every reset.
908E625
40
Analog Integrated Circuit Device Data
Freescale Semiconductor