908E625_10 Datasheet, PDF (35/49 Pages) Freescale Semiconductor, Inc – Integrated Quad Half H-Bridge with Power Supply, Embedded MCU, and LIN Serial Communication

FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
Coil Current
Voltage on ¹
1
BEMF Signal
Figure 20. BEMF Signal Generation
HALF-BRIDGE OVERTEMPERATURE
PROTECTION
The half-bridge outputs provide an overtemperature pre-
warning with the HTF in the Interrupt Flag Register (IFR). In
order to protect the outputs against overtemperature, the
High-Temperature Reset must be enabled. If this value is
reached, the part generates a reset and disables all power
outputs.
done by the low- and high-voltage interrupt circuitry. If one of
these flags (LVF, HVF) is set, the outputs are automatically
disabled.
The overvoltage/undervoltage status flags are cleared
(and the outputs re-enabled) by writing a Logic [1] to the LVF/
HVF flags in the Interrupt Flag Register or by reset. Clearing
this flag is useless as long as a high- or low-voltage condition
is present.
HALF-BRIDGE OVERCURRENT PROTECTION
The half-bridges are protected against short to GND, short
to VSUP, and load shorts.
In the event an overcurrent on the high side is detected,
the high-side MOSFETs on all HB high-side MOSFETs are
switched off automatically. In the event an overcurrent on the
low side is detected, all HB low-side MOSFETs are switched
off automatically. In both cases the overcurrent status flag
HB_OCF in the System Status Register (SYSSTAT) is set.
The overcurrent status flag is cleared (and the outputs re-
enabled) by writing a Logic [1] to the HB_OCF flag in the
System Status Register or by reset.
HALF-BRIDGE OVERVOLTAGE/UNDERVOLTAGE
The half-bridge outputs are protected against
undervoltage and overvoltage conditions. This protection is
HALF-BRIDGE CONTROL REGISTER (HBCTL)
Register Name and Address: HBCTL - $02
Bits
7
6
543
2
1
0
Read
0
0
0
OFC_EN CSA
CLS2 CLS1 CLS0
Write
Reset 0
0
0
0
0
0
0
0
H-Bridge Offset Chopping Enable Bit (OFC_EN)
This read/write bit enables offset chopping. Reset clears
the OFC_EN bit.
• 1 = Offset chopping enabled
• 0 = Offset chopping disabled
Analog Integrated Circuit Device Data
Freescale Semiconductor
908E625
35