33931 Datasheet, PDF (4/21 Pages) Freescale Semiconductor, Inc – 5.0 A Throttle Control H-bridge

PIN CONNECTIONS
Table 1. 33931 Pin Definitions (continued)
A functional description of each pin can be found in the Functional Description section beginning on page 11.
Pin
Pin
Pin Name _Function
Formal Name
Definition
41
CCP
Analog
Charge Pump External reservoir capacitor connection for the internal charge pump;
Output
Capacitor
connected to VPWR. Allowable values are 30 nF to 100 nF. Note: This
capacitor is required for the proper performance of the device.
42
IN2
Logic Input
Input 2
Logic input control of OUT2;e.g., when IN2 is logic HIGH, OUT2 is set to
VPWR, and when IN2 is logic LOW, OUT2 is set to PGND. (Schmitt trigger
Input with ~ 80 μA source so default condition = OUT2 HIGH.)
43
IN1
Logic Input
Input 1
Logic input control of OUT1; e.g., when IN1 is logic HIGH, OUT1 is set to
VPWR, and when IN1 is logic LOW, OUT1 is set to PGND. (Schmitt trigger
Input with ~ 80 μA source so default condition = OUT1 HIGH.)
44
SF
Logic
Status Flag
Open drain active LOW Status Flag output (requires an external pull-up resistor
Output -
(Active Low)
to V_DD. Maximum permissible load current < 0.5 mA. Maximum V_CEsat < 0.4 V
Open Drain
@ 0.3 mA. Maximum permissible pull-up voltage < 7.0 V.)
TAB
AGND
Analog
Analog Signal The low-current analog signal ground must be connected to PGND via low-
Ground
Ground
impedance path (<10 mΩ, 0 Hz to 20 kHz). Exposed TAB is also the main
heatsinking path for the device.
12-33
N/C
None
No Connect
Pin is not used
33931
4
Analog Integrated Circuit Device Data
Freescale Semiconductor