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33931 Datasheet, PDF (3/21 Pages) Freescale Semiconductor, Inc – 5.0 A Throttle Control H-bridge
PIN CONNECTIONS
AGND
Tab
D1
1
44
FB
2
43
EN/D2
3
42
VPWR
4
41
VPWR
5
40
VPWR
6
39
OUT1
7
38
OUT1
8
37
OUT1
9
36
PGND
10
35
PGND
11
34
N/C
12
33
N/C
13
32
N/C
14
31
N/C
15
30
N/C
16
29
N/C
17
28
N/C
18
27
N/C
19
26
N/C
20
25
N/C
21
24
N/C
22
23
Tab
PIN CONNECTIONS
SF
IN1
IN2
CCP
VPWR
VPWR
OUT2
OUT2
OUT2
PGND
PGND
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
N/C
Figure 3. 33931 Pin Connections
Table 1. 33931 Pin Definitions
A functional description of each pin can be found in the Functional Description section beginning on page 11.
Pin
Pin
Pin Name Function
Formal Name
Definition
1
D1
Logic Input Disable Input 1 When D1 is logic HIGH, both OUT1 and OUT2 are tri-stated. Schmitt trigger
(Active High)
input with ~80 μA source so default condition = disabled.
2
3
4-6,40,39
7-9
10,11,34,35
FB
EN/D2
VPWR
OUT1
PGND
Analog
Output
Logic Input
Feedback
Enable Input
Power Input Positive Power
Supply
Power
Output
H-bridge Output 1
Power
Ground
Power Ground
The load current feedback output provides ground referenced 0.24% of the high
side output current. (Tie to GND through a resistor if not used.)
When EN/D2 is logic HIGH the H-bridge is operational. When EN/D2 is logic
LOW, the H-bridge outputs are tri-stated and placed in Sleep mode. (logic input
with ~ 80 μA sink so default condition = Sleep mode.)
These pins must be connected together physically as close as possible and
directly soldered down to a wide, thick, low resistance supply plane on the PCB.
Source of high side MOSFET1 and drain of low side MOSFET1.
High-current power ground pins must be connected together physically as
close as possible and directly soldered down to a wide, thick, low resistance
ground plane on the PCB.
36-38
OUT2
Power
Output
H-bridge Output 2 Source of high side MOSFET2 and drain of low side MOSFET2.
Analog Integrated Circuit Device Data
Freescale Semiconductor
33931
3